KITMPR03XEVM Freescale, KITMPR03XEVM Datasheet - Page 5

• Manufacturer Part Number: KITMPR03XEVM
• Manufacturer: Freescale

Specifications of KITMPR03XEVM

• Lead Free Status / RoHS Status: Compliant

Sensors
Freescale Semiconductor
2.3.3
One data bit is transferred during each clock pulse
2.3.4
The acknowledge bit is a clocked 9
byte transferred effectively requires 9 bits. The master generates the 9
the acknowledge clock pulse, such that the SDA line is stable low during the high period of the clock pulse. When the master is
transmitting to the MPR03X, the MPR03X generates the acknowledge bit, since the MPR03X is the recipient. When the MPR03X
is transmitting to the master, the master generates the acknowledge bit, since the master is the recipient.
2.3.5
The MPR03X has a 7-bit long slave address
is low for a write command and high for a read command.
The MPR03X monitors the bus continuously, waiting for a START condition followed by its slave address. When a MPR03X
recognizes its slave address, it acknowledges and is then ready for continued communication.
The MPR031 and MPR032 slave addresses are show in
BY TRANSMITTER
Bit Transfer
Acknowledge
The Slave Address
BY RECEIVER
SDA
SCL
SDA
SCL
SDA
SDA
SCL
CONDITION
START
CONDITION
MSB
S
START
1
S
th
bit
0
(Figure
(Figure
1
Table 2.
8) which the recipient uses to handshake receipt of each byte of data. Thus each
0
Part Number
MPR031
MPR032
Figure 9. Slave Address
(Figure
Figure 8. Acknowledge
Figure 7. Bit Transfer
9). The bit following the 7-bit slave address (bit eight) is the R/W bit, which
1
Table
7). The data on SDA must remain stable while SCL is high.
2
2.
0
I
2
C Address
0x4A
0x4B
th
clock pulse, and the recipient pulls down SDA during
1
ACKNOWLEDGEMENT
CLOCK PULSE FOR
0
8
R/W
CONDITION
ACK
STOP
P
9
MPR03X
5