R0E572850CFK00 Renesas Electronics America, R0E572850CFK00 Datasheet - Page 54

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R0E572850CFK00

Manufacturer Part Number
R0E572850CFK00
Description
Manufacturer
Renesas Electronics America
Datasheet

Specifications of R0E572850CFK00

Lead Free Status / RoHS Status
Supplier Unconfirmed
• Trace acquisition condition
• Displaying a trace
• Branch trace
• Writing memory immediately before generating a break
Rev. 4.00 Feb. 18, 2009 Page 46 of 64
REJ10J1662-0400
Do not set the trace-end condition for the SLEEP instruction and the branch instruction
according to which the delay slot becomes the SLEEP instruction.
When [I-BUS, M-Bus & Branch] is selected and the trace acquisition condition is set for the
M-bus and I-bus with the Event Condition, set the M-bus condition and the I-bus condition for
[Event Condition 1] and [Event Condition 2], respectively.
If the settings of [I-Trace mode] are changed during execution of the program, execution will
be suspended. (The number of clock cycles to be suspended during execution of the program is
66 bus clock cycles (Bφ). If the bus clock (Bφ) is 20 MHz, the program will be suspended for
3.3 μs.)
If a trace is displayed during execution of the program, execution will be suspended to acquire
the trace information. (The number of clock cycles to be suspended during execution of the
program is 24576 bus clock cycles (Bφ). If the bus clock (Bφ) is 20 MHz, the program will be
suspended for 1228.8 μs.)
If breaks occur immediately after executing non-delayed branch and TRAPA instructions and
generating a branch due to exception or interrupt, a trace for one branch will not be acquired
immediately before such breaks.
However, this does not affect on generation of breaks caused by a BREAKPOINT and a break
before executing instructions of Event Condition.
If an instruction is executed to write memory immediately before generating a break, trace
acquisition may not be performed.