72245LB15PF Integrated Device Technology (Idt), 72245LB15PF Datasheet - Page 11

• Manufacturer Part Number: 72245LB15PF
• Description: FIFO Mem Sync Dual Depth/Width Uni-Dir 4K x 18 64-Pin TQFP
• Manufacturer: Integrated Device Technology (Idt)

Specifications of 72245LB15PF

• Package: 64TQFP
• Configuration: Dual
• Bus Directional: Uni-Directional
• Density: 72 Kb
• Organization: 4Kx18
• Data Bus Width: 18 Bit
• Timing Type: Synchronous
• Expansion Type: Depth|Width
• Typical Operating Supply Voltage: 5 V
• Operating Temperature: 0 to 70 °C

NOTE:
1. When t
IDT72205LB/72215LB/72225LB/72235LB/72245LB CMOS SyncFIFO
256 x 18, 512 x 18, 1,024 x 18, 2,048 x 18 and 4,096 x 18
WCLK
D
Q
Q
D
RCLK
0
0
0
0
The Latency Timing applies only at the Empty Boundary (EF = LOW).
WEN
WCLK
–D
–Q
RCLK
- D
- Q
LD
15
15
17
17
SKEW2
t
t
ENS
LOW
DS
t
CLKH
minimum specification, t
DATA WRITE 1
t
CLKH
PAE OFFSET
t
t
ENH
SKEW2
DATA IN OUTPUT REGISTER
t
CLK
t
CLK
t
t
FRL
ENS
ENS
t
t
t
DS
ENS
ENS
t
CLKL
(maximum) = t
t
FRL
(1)
t
UNKNOWN
CLKL
CLK
Figure 10. Write Programmable Registers
Figure 11. Read Programmable Registers
PAF OFFSET
t
t
t
REF
ENH
t
DH
ENH
+ t
t
SKEW2
A
Figure 9. Empty Flag Timing
. When t
SKEW2
11
PAE OFFSET
t
A
< minimum specification, t
TM
t
REF
t
ENS
t
DS
D
DATA WRITE 2
0
–D
FRL
PAF OFFSET
11
(maximum) = either 2*t
t
ENH
t
SKEW2
PAE OFFSET
DATA READ
COMMERCIAL AND INDUSTRIAL
t
FRL
TEMPERATURE RANGES
CLK
(1)
+ t
PAE OFFSET
OCTOBER 22, 2008
t
SKEW2
REF
or t
2766 drw 11
CLK
2766 drw 12
2766 drw 13
+ t
SKEW2
.