PCF8583T/F5,512 NXP Semiconductors, PCF8583T/F5,512 Datasheet - Page 12

PCF8583T/F5,512

Manufacturer Part Number
PCF8583T/F5,512
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PCF8583T/F5,512

Bus Type
Serial (2-Wire, I2C)
Operating Supply Voltage (typ)
3.3/5V
Package Type
SO
Operating Supply Voltage (max)
6V
Operating Supply Voltage (min)
2.5V
Operating Temperature Classification
Industrial
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Pin Count
8
Mounting
Surface Mount
Date Format
DW:DM:M:Y
Time Format
HH:MM:SS:hh
Lead Free Status / RoHS Status
Not Compliant
Philips Semiconductors
In the clock mode, if the alarm enable is not activated
(alarm enable bit of control/status register is logic 0), the
interrupt output toggles at 1 Hz with a 50% duty cycle (may
be used for calibration). This is the default power-on state
of the device. The OFF voltage of the interrupt output may
exceed the supply voltage, up to a maximum of 6.0 V.
A logic diagram of the interrupt output is shown in Fig.11.
7.10
A 32.768 kHz quartz crystal has to be connected to OSCI
(pin 1) and OSCO (pin 2). A trimmer capacitor between
OSCI and V
frequency adjustment). A 100 Hz clock signal is derived
from the quartz oscillator for the clock counters.
In the 50 Hz clock mode or event-counter mode the
oscillator is disabled and the oscillator input is switched to
a high impedance state.
1997 Jul 15
handbook, full pagewidth
Clock/calendar with 240
Oscillator and divider
DD
is used for tuning the oscillator (see quartz
MSB
7
MRB007
Fig.10 Alarm control register, event-counter mode.
6
5
8-bit RAM
4
3
2
12
This allows the user to feed the 50 Hz reference frequency
or an external high speed event signal into the input OSCI.
7.11
When power-up occurs the I
control/status register and all clock counters are reset.
The device starts time-keeping in the 32.768 kHz clock
mode with the 24 h format on the first of January at
0.00.00: 00. A 1 Hz square wave with 50% duty cycle
appears at the interrupt output pin (starts HIGH).
It is recommended to set the stop counting flag of the
control/status register before loading the actual time into
the counters. Loading of illegal states may lead to a
temporary clock malfunction.
1
LSB
0
Initialization
memory location 08
reset state: 0000 0000
timer function :
000
001
010
011
100
101
110
111
timer interrupt enable :
0
1
clock alarm function :
00
01
10
11
timer alarm enable :
0
1
alarm interrupt enable :
0
1
no timer alarm
timer alarm
alarm flag, no interrupt
alarm flag, interrupt
no timer
units
100
10 000
1 000 000
not allowed
not allowed
test mode, all counters
in parallel
timer flag, no interrupt
timer flag, interrupt
no event alarm
event alarm
not allowed
not allowed
2
C-bus interface, the
Product specification
PCF8583

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