WJLXT971ALE.A4-857346 Cortina Systems Inc, WJLXT971ALE.A4-857346 Datasheet - Page 66
WJLXT971ALE.A4-857346
Manufacturer Part Number
WJLXT971ALE.A4-857346
Description
Manufacturer
Cortina Systems Inc
Datasheet
1.WJLXT971ALE.A4-857346.pdf
(96 pages)
Specifications of WJLXT971ALE.A4-857346
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LXT971A PHY
Datasheet
249414, Revision 5.2
13 September 2007
Figure 28
Table 33
Cortina Systems
100BASE-TX Receive Timing - 4B Mode
100BASE-TX Receive Timing Parameters - 4B Mode
®
RXD[3:0], RX_DV, RX_ER
RX_CLK High
RXD[3:0], RX_DV, RX_ER hold
from RX_CLK High
CRS asserted to RXD[3:0], RX_DV
Receive start of “J” to CRS asserted
Receive start of “T” to CRS de-asserted
Receive start of “J” to COL asserted
Receive start of “T” to COL de-asserted
1. Typical values are at 25 °C and are for design aid only, not guaranteed, and not subject to production
2. BT (Bit Time) is the duration of one bit as transferred to and from the Mac and is the reciprocal of the bit
3. RX_ER is not shown in the figure.
LXT971A Single-Port 10/100 Mbps PHY Transceiver
testing.
rate. 100BASE-T bit time = 10
RXD[3:0]
RX_CLK
RX_DV
TPFI
CRS
COL
Parameter
0 ns
3
setup to
-8
s or 10 ns.
t4
t6
Sym
t1
t2
t3
t4
t5
t6
t7
Min
10
10
12
10
16
17
t3
3
250 ns
Typ
–
–
–
–
–
–
–
1
t5
t7
Max
t1
16
17
22
20
–
–
5
t2
7.2 AC Timing Diagrams and
B3491-02
Units
BT
BT
BT
BT
BT
ns
ns
2
Test Conditions
Parameters
–
–
–
–
–
–
–
Page 66
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