HBLXT9785HC.D0 Cortina Systems Inc, HBLXT9785HC.D0 Datasheet - Page 4

• Manufacturer Part Number: HBLXT9785HC.D0
• Manufacturer: Cortina Systems Inc

Specifications of HBLXT9785HC.D0

• Lead Free Status / RoHS Status: Not Compliant

LXT9785/LXT9785E
Datasheet
249241, Revision 11.0
16 April 2007
5.0
Cortina Systems
4.10
4.11
4.12
4.13
4.14
Application Information ............................................................................................................161
5.1
5.2
5.3
4.9.3
10 Mbps Operation ...........................................................................................................146
4.10.1 Preamble Handling ..............................................................................................146
4.10.2 Dribble Bits ..........................................................................................................146
4.10.3 Link Test ..............................................................................................................146
4.10.4 Jabber ..................................................................................................................147
DTE Discovery Process ....................................................................................................147
4.11.1 Definitions ............................................................................................................148
4.11.2 Interaction between Processor, MAC, and PHY ..................................................148
4.11.3 Management Interface and Control .....................................................................149
4.11.4 DTE Discovery Process Flow ..............................................................................150
4.11.5 DTE Discovery Behavior......................................................................................151
Monitoring Operations ......................................................................................................153
4.12.1 Monitoring Auto-Negotiation ................................................................................153
4.12.2 Per-Port LED Driver Functions ............................................................................153
4.12.3 Out-of-Band Signaling .........................................................................................154
4.12.4 Boundary Scan Interface .....................................................................................155
4.12.5 State Machine ......................................................................................................155
4.12.6 Instruction Register ..............................................................................................155
4.12.7 Boundary Scan Register ......................................................................................156
Cable Diagnostics Overview .............................................................................................156
4.13.1 Features...............................................................................................................156
4.13.2 Operation .............................................................................................................157
4.13.3 Implementation Considerations ...........................................................................157
4.13.4 Basic Implementation ..........................................................................................158
Link Hold-Off Overview.....................................................................................................159
4.14.1 Features...............................................................................................................159
4.14.2 Operation .............................................................................................................159
Design Recommendations................................................................................................161
General Design Guidelines ...............................................................................................161
5.2.1
5.2.2
5.2.3
5.2.4
5.2.5
5.2.6
Typical Application Circuits ...............................................................................................165
®
LXT9785 and LXT9785E Advanced 8-Port 10/100 Mbps PHY Transceivers
PMA Sublayer ......................................................................................................142
4.9.3.1
4.9.3.2
4.9.3.3
4.9.3.4
4.9.3.5
4.9.3.6
4.9.3.7
4.10.3.1 Link Failure ..........................................................................................147
4.13.2.1 Short and Long Cable Testing Requirements......................................157
4.13.2.2 Precision ..............................................................................................157
Power Supply Filtering .........................................................................................161
Power and Ground Plane Layout Considerations................................................162
5.2.2.1
MII Terminations ..................................................................................................162
Twisted-Pair Interface ..........................................................................................162
5.2.4.1
The Fiber Interface ..............................................................................................163
LED Circuit...........................................................................................................164
Link ......................................................................................................143
Link Failure Override............................................................................144
Carrier Sense/Data Valid (RMII) ..........................................................144
Carrier Sense (SMII) ............................................................................144
Receive Data Valid (SMII)....................................................................144
Twisted-Pair PMD Sublayer.................................................................144
Fiber PMD Sublayer.............................................................................145
Chassis Ground ...................................................................................162
Magnetic Requirements .......................................................................163
Contents
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