KSZ8721BL A4 TR Micrel Inc, KSZ8721BL A4 TR Datasheet
KSZ8721BL A4 TR
Specifications of KSZ8721BL A4 TR
Related parts for KSZ8721BL A4 TR
KSZ8721BL A4 TR Summary of contents
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... XO Micrel, Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel + 1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com February 2005 3.3V Single Power Supply 10/100BASE-TX/FX MII Physical Layer Transceiver Features • Single chip 100BASE-TX/100BASE-FX/10BASE-T physical layer solution • ...
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KS8721BL/SL Features (continued) • LED outputs for link, activity, full-/half-duplex, collision, and speed • Supports back-to-back for media converter applications • Supports MDI/MDI-X auto-crossover • KS8721BL is a drop-in replacement for the KS8721BT in the same footprint ...
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KS8721BL/SL Revision History Revision Date Summary of Changes 0.90 1/12/04 Created. 1.0 3/06/04 Initial release. Change to new format. Add part-ordering information. Editorial changes on pin description, RMII, and media converter operation. Update circuit design, reset timing, thermal resistance, electrical ...
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... Circuit Design Reference for Power Supply ..........................................................................................................17 Register Map ............................................................................................................................................................18 Register 0h: Basic Control ....................................................................................................................................18 Register 1h: Basic Status .....................................................................................................................................18 Register 2h: PHY Identifier 1 ................................................................................................................................19 Register 3h: PHY Identifier 2 ................................................................................................................................19 Register 4h: Auto-Negotiation Advertisement .......................................................................................................19 Register 5h: Auto-Negotiation Link Partner Ability ................................................................................................19 Register 6h: Auto-Negotiation Expansion .............................................................................................................20 Register 7h: Auto-Negotiation Next Page .............................................................................................................20 Register 8h: Link Partner Next Page Ability .........................................................................................................20 ...
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... KS8721BL/SL Register Map (continued) Register 15h: RXER Counter .....................................................................................................................................21 Register 1bh: Interrupt Control/Status Register .....................................................................................................21 Register 1fh: 100BASE-TX PHY Controller ..............................................................................................................21 Absolute Maximum Ratings .........................................................................................................................................23 Operating Ratings .........................................................................................................................................................23 Electrical Characteristics .............................................................................................................................................23 Timing Diagrams ...........................................................................................................................................................25 Selection of Isolation Transformer ..............................................................................................................................32 Selection of Reference Crystal ....................................................................................................................................32 Package Information .....................................................................................................................................................33 February 2005 5 Micrel M9999-022105 ...
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... During reset, the pull-up/pull-down value is latched as PHYADDR[2]. See “Strapping Options” section for details. MII Receive Data Output. During reset, the pull-up/pull-down value is latched as PHYADDR [3]. See “Strapping Options” section for details. MII Receive Data Output. During reset, the pull-up/pull-down value is latched as PHYADDR [4]. See “ ...
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... See “Circuit Design Ref. for Power Supply” section for details. Management Interface (MII) Interrupt Out. Interrupt level set by Register 1f, bit 9. During reset, latched as PHYAD[0]. See “Strapping Options” section for details. Link/Activity LED Output. The external pull-down enable test mode and only used for the factory test. Active low. ...
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KS8721BL/SL Pin Number Pin Name Type 31 VDDRX 32 RX- 10BASE- FXSD/FXEN Ipd/O 35 GND GND 36 GND GND 37 REXT 38 VDDRCV 39 GND GND 40 TX VDDTX tion 43 GND ...
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... See “Reference Circuit” section for pull-up/pull-down and float information. 3. Some devices may drive MII pins that are designated as output (PHY) on power-up, resulting in incorrect strapping values latched at reset rec- mmended that an external pull-down via 1kΩ resistor be used in these applications to augment the 8721's internal pull-down. ...
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... SSOP (SM) M9999-022105 48 RST# 47 VDDPLL GND 43 GND 42 VDDTX 41 TX+ 40 TX- 39 GND 38 VDDRCV 37 REXT MDIO 36 GND MDC 35 GND RXD1/PHYAD1 RXD2/PHYAD2 34 FXSD/FXEN RXD1/PHYAD3 RXD0/PHYAD4 33 RX+ VDDIO 32 RX- GND RXDV/PCS_LPBK 31 VDDRX RXC 30 PD# RXER/ISO GND 29 LED3/NWAYEN 28 LED2/DUPLEX 27 LED1/SPD100 26 LED0/TEST 25 INT#/PHYAD0 GND 35 2 GND ...
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KS8721BL/SL Introduction 100BASE-TX Transmit The 100BASE-TX transmit function performs parallel to serial conversion, NRZ-to-NRZI conversion, and MLT-3 encoding and transmission. The circuitry starts with a parallel to serial conversion that converts the 25MHz, 4-bit nibbles into a 125MHz serial bit ...
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... Interface. This interface allows upper-layer devices to monitor and control the state of the KS8721BL/SL. The MDIO interface consists of the following: • A physical connection including a data line (MDIO), a clock line (MDC), and an optional interrupt line (INTRPT). • A specific protocol that runs across the above-mentioned physical connection that allows one controller to com- municate with multiple KS8721BL/SL devices ...
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... RX_E. REF_CLK is sourced by the MAC or an external source. Switch implementations may choose to provide REF_CLK as an input or an output depending on whether they provide a REF_CLK output or rely on an external clock distribution device. Each PHY device must have an input corresponding to this clock but may use a single clock input for multiple PHYs implemented on a single IC. ...
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... Receive State Diagram). RX_ER is asserted for one or more REF_CLK periods to indicate that an error (e.g., a coding error or any error that a PHY is capable of detecting, and that may otherwise be undetectable by the MAC sublayer) is de- tected somewhere in the frame presently being transferred from the PHY. RX_ER transitions synchronously with respect to REF_CLK ...
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... BASE-T crossover function cable is shown below. This feature eliminates the confusion in applications by allowing the use of both straight and crossover cables. This feature is controlled by register 1f:13. See “Register 1fh–100BASE-TX PHY Controller” section for details. 10/100 BASE-T ...
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KS8721BL/SL Power Management The KS8721BL/SL offers the following modes for power management: • Power-Down Mode: This mode can be achieved by writing to Register 0.11 or pulling pin 30 PD# low. • Power-Saving Mode: This mode can be disabled by ...
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... Circuit Design Reference for Power Supply Micrel’s integrated built-in, voltage regulator technology and thoughtful implementation allows the user to save BOM cost on both existing and future designs with the use of the new KS8721BL/SL single supply, single port 10/100 Ethernet PHY. +3.3V ...
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... Ignored if Auto-Negotiation is enabled (0. enable auto-negotiation process (override 0.13 and 0.8 disable auto-negotiation process power-down mode normal operation electrical isolation of PHY from MII and TX+/TX normal operation restart auto-negotiation process normal operation. Bit is self-clearing full-duplex half-duplex enable COL test disable COL test. ...
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... Remote Fault 1.3 Auto-Negotiation Ability 1.2 Link Status 1.1 Jabber Detect 1.0 Extended Capability Register 2h - PHY Identifier 1 2.15:0 PHY ID Number Register 3h - PHY Identifier 2 3.15:10 PHY ID Number 3.9:4 Model Number 3.3:0 Revision Number Register 4h - Auto-Negotiation Advertisement 4.15 Next Page 4.14 Reserved 4 ...
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KS8721BL/SL Address Name 5.11:10 Pause 5.9 100 BASE-T4 5.8 100BASE-TX Full-Duplex 5.7 100BASE-TX 5.6 10BASE-T Full-Duplex 5.5 10BASE-T 5.4:0 Selector Field Register 6h - Auto-Negotiation Expansion 6.15:5 Reserved 6.4 Parallel Detection Fault 6.3 Link Partner Next Page Able 6.2 Next ...
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... Parallel Detect Fault Interrupt 1b.3 Link Partner Acknowledge Interrupt 1b.2 Link Down Interrupt 1b.1 Remote Fault Interrupt 1b.0 Link Up Interrupt Register 1fh - 100BASE-TX PHY Controller 1f.15:14 Reserved 1f:13 Pairswap Disable 1f.12 Energy Detect 1f.11 Force Link 1f.10 Power-Saving 1f.9 Interrupt Level 1f ...
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... RW: Read/Write, RO: Read Only, SC: Self Clear, LH: Latch High, LL: Latch Low. Some of the default values are set by strap-in. See “Strapping Options.” M9999-022105 Description 1 = Flow control capable flow control PHY in isolate mode Not isolated. [001] = 10BASE-T half-duplex. [010] = 100BASE-TX half-duplex. [011] = Reserved [101] = 10BASE-T full-duplex. ...
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KS8721BL/SL Absolute Maximum Ratings Storage Temperature (T ) ........................ –55°C to +150°C S Supply Referenced to GND ..........................–0.5V to +4.0V All Pins .........................................................–0.5V to +4.0V Important: Please read the Notes at the bottom of the page. Electrical Characteristics V = ...
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KS8721BL/SL Symbol Parameter 100BASE-TX Transmit (measured differentially after 1:1 transformer) Duty Cycle Distortion Overshoot V Reference Voltage of ISET SET Propagation Delay Jitters 10BASE-TX Receive R RX+/RX– Differential IN Input Resistance V Squelch Threshold SQ 10BASE-TX Transmit (measured differentially after ...
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KS8721BL/SL Timing Diagrams Symbol Parameter t TXD [3:0] Set-Up to TXC High SU1 t TXEN Set-Up to TXC High SU2 t TXD [3:0] Hold After TXC High HD1 t TXEN Hold After TXC High HD2 t TXEN High to CRS ...
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KS8721BL/SL TXC TXEN TXD[3:0], TXER CRS TX+/TX- Symbol Parameter t TXD [3:0] Set-Up to TXC High SU1 t TXEN Set-Up to TXC High SU2 t TXD [3:0] Hold After TXC High HD1 t TXER Hold After TXC High HD2 t ...
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KS8721BL/SL RX+/RX- CRS RXDV RXD[3:0] RXER RXC Symbol Parameter t RXC Period P t RXC Pulse Width WL t RXC Pulse Width WH t RXD [3:0], RXER, RXDV Set-Up to Rising Edge of RXC SU t RXD [3:0], RXER, RXDV ...
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KS8721BL/SL TX+/TX- TX+/TX- Figure 7. Auto-Negotiation/Fast Link Pulse Timing Symbol Parameter t FLP Burst to FLP Burst BTB t FLP Burst Width FLPW t Clock/Data Pulse Width PW t Clock Pulse to Data Pulse CTD t Clock Pulse to Clock ...
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KS8721BL/SL MDC MDI O (Into Ch ip) MDI O (Out of Chip) Symbol Parameter t MDC Period P t MDIO Set-Up to MDC (MDIO as Input) MD1 t MDIO Hold After MDC (MDIO as Input) MD2 t MDC to MDIO ...
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KS8721BL/SL Supply Voltage RST_N Strap-In Value Symbol Parameter t Stable Supply Voltages to Reset High sr Reset Circuit Diagram Micrel recommendeds the following discrete reset circuit as shown in Figure 10 when powering up the KS8721BL/SL device. For the application ...
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KS8721BL/SL Reference Circuit for Strapping Option Configuration Figure 12 shows the reference circuit for strapping option pins. Reference circuits for unmanaged programming through LED ports. Figure 12. Reference Circuit, Strapping Option Pins February 2005 3.3V 220 Pull-Up 10k LED pin ...
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KS8721BL/SL Selection of Isolation Transformer One simple 1:1 isolation transformer is needed at the line interface. An isolation transformer with integrated common-mode choke is recommended for exceeding FCC requirements. The following table gives recommended transformer character- istics. Characteristic Turns Ratio ...
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KS8721BL/SL Package Information February 2005 48-Pin SSOP (SM) 33 Micrel M9999-022105 ...
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KS8721BL/SL MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA + 1 (408) 944-0800 TEL The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for ...