SI3210-GTR Silicon Laboratories Inc, SI3210-GTR Datasheet - Page 35

• Manufacturer Part Number: SI3210-GTR
• Manufacturer: Silicon Laboratories Inc

Specifications of SI3210-GTR

• Lead Free Status / RoHS Status: Compliant

2.1.6. Loop Closure Transition Detection
A loop closure transition event signals that the terminal
equipment has gone from on-hook to off-hook or from
off-hook to on-hook; detection occurs while the ProSLIC
linefeed is in its on-hook transmission or active states.
The ProSLIC performs loop closure detection digitally
using its on-chip monitor A/D converter. The functional
blocks required to implement loop closure detection are
shown in Figure 18. The primary input to the system is
the Loop Current Sense value provided in the LCS
register (direct Register 79). The LCS value is
processed in the Input Signal Processor when the
ProSLIC is in the on-hook transmission or active
linefeed state, as indicated by the Linefeed Shadow
register, LFS[2:0] (direct Register 64). The data then
feeds into a programmable digital low-pass filter, which
removes unwanted ac signal components before
threshold detection.
The output of the low-pass filter is compared to a
programmable threshold, LCRT (indirect Register 28).
The threshold comparator output feeds a programmable
debouncing filter. The output of the debouncing filter
remains in its present state unless the input remains in
the opposite state for the entire period of time
programmed by the loop closure debounce interval,
LCDI (direct Register 69). If the debounce interval has
been satisfied, the LCR bit will change state to indicate
that a valid loop closure transition has occurred. A loop
closure transition interrupt is generated if enabled by
the LCIE bit (direct Register 22). Table 26 lists the
registers that must be written or monitored to correctly
detect a loop closure condition.
2.1.7. Loop Closure Threshold Hysteresis
Silicon revisions C and higher support the addition of
programmable hysteresis to the loop closure threshold,
which can be enabled by setting HYSTEN = 1 (direct
Register 108, bit 0). The hysteresis is defined by LCRT
LCS
LVS
Processor
LFS
Signal
Input
LCVE
ISP_OUT
Figure 18. Loop Closure Detection
HYSTEN
Digital
NCLR
LPF
Loop Closure
LCRT
Threshold
LCRTL
Rev. 1.45
+
–
(indirect Register 28) and LCRTL (indirect Register 43),
which set the upper and lower bounds, respectively.
2.1.8. Voltage-Based Loop Closure Detection
Silicon revisions C and higher also support an optional
voltage-based loop closure detection mode, which is
enabled by setting LCVE = 1 (direct Register 108,
bit 2). In this mode, the loop voltage is compared to the
loop
represents a minimum voltage threshold instead of a
maximum current threshold. If hysteresis is also
enabled, LCRT represents the upper voltage boundary,
and LCRTL represents the lower voltage boundary for
hysteresis.
detection is an option, the default current-based loop
closure detection is recommended.
Loop Closure
Interrupt Pending
Loop Closure
Interrupt Enable
Loop Closure Thresh-
old
Loop Closure
Threshold—Lower
Loop Closure Filter
Coefficient
Loop Closure Detect
Status (monitor only)
Loop Closure Detect
Debounce Interval
Hysteresis Enable
Voltage-Based Loop
Closure
Parameter
closure
Table 26. Register Set for Loop
Debounce
Filter
LCDI
Although
threshold
Closure Detection
LCR
LCIP
LCIE
LCRT[5:0]
LCRTL[5:0]
NCLR[12:0]
LCR
LCDI[6:0]
HYSTEN
LCVE
Si3210/Si3211
voltage-based
Register
register
Interrupt
Logic
LCIE
Direct Reg. 19
Direct Reg. 22
Indirect Reg. 28
Indirect Reg. 43
Direct Reg. 68
Direct Reg. 69
Direct Reg. 108
Indirect Reg. 35
Direct Reg. 108
(LCRT),
LCIP
loop
Location
closure
which
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