XC5VLX50-1FFG324C Xilinx Inc, XC5VLX50-1FFG324C Datasheet - Page 2
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XC5VLX50-1FFG324C
Manufacturer Part Number
XC5VLX50-1FFG324C
Description
FPGA, VIRTEX-5 LX, 50K, 324FBGA
Manufacturer
Xilinx Inc
Series
Virtex™-5 LXr
Datasheets
1.XC5VLX30-1FFG324C.pdf
(91 pages)
2.XC5VLX30-1FFG324C.pdf
(13 pages)
3.XC5VLX30-1FFG324C.pdf
(385 pages)
Specifications of XC5VLX50-1FFG324C
No. Of Logic Blocks
7200
Family Type
Virtex-5
No. Of Speed Grades
1
Total Ram Bits
1769472
No. Of I/o's
220
Clock Management
DCM, PLL
I/o Supply Voltage
3.3V
Operating Frequency Max
550MHz
Number Of Logic Elements/cells
46080
Number Of Labs/clbs
3600
Number Of I /o
220
Voltage - Supply
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
324-BBGA, FCBGA
Core Supply Voltage Range
1V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
HW-V5-ML561-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML550-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML521-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-AFX-FF324-500-G - BOARD DEV VIRTEX 5 FF324HW-V5GBE-DK-UNI-G - KIT DEV V5 LXT GIGABIT ETHERNET122-1508 - EVALUATION PLATFORM VIRTEX-5
Number Of Gates
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
122-1562
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC5VLX50-1FFG324C
Manufacturer:
XILINX
Quantity:
101
Company:
Part Number:
XC5VLX50-1FFG324C
Manufacturer:
XilinxInc
Quantity:
3 000
Company:
Part Number:
XC5VLX50-1FFG324C
Manufacturer:
Xilinx Inc
Quantity:
10 000
Company:
Part Number:
XC5VLX50-1FFG324CES
Manufacturer:
Xilinx Inc
Quantity:
10 000
Virtex-5 Family Overview
Table 1: Virtex-5 FPGA Family Members
2
XC5VLX30
XC5VLX50
XC5VLX85
XC5VLX110
XC5VLX155
XC5VLX220
XC5VLX330
XC5VLX20T
XC5VLX30T
XC5VLX50T
XC5VLX85T
XC5VLX110T
XC5VLX155T
XC5VLX220T 160 x 108 34,560
XC5VLX330T 240 x 108 51,840
XC5VSX35T
XC5VSX50T
XC5VSX95T
XC5VSX240T
XC5VTX150T
XC5VTX240T
XC5VFX30T
XC5VFX70T
XC5VFX100T
XC5VFX130T
XC5VFX200T
Notes:
1.
2.
3.
4.
5.
6.
7.
8.
Device
Virtex-5 FPGA slices are organized differently from previous generations. Each Virtex-5 FPGA slice contains four LUTs and four flip-flops (previously
it was two LUTs and two flip-flops.)
Each DSP48E slice contains a 25 x 18 multiplier, an adder, and an accumulator.
Block RAMs are fundamentally 36 Kbits in size. Each block can also be used as two independent 18-Kbit blocks.
Each Clock Management Tile (CMT) contains two DCMs and one PLL.
This table lists separate Ethernet MACs per device.
RocketIO GTP transceivers are designed to run from 100 Mb/s to 3.75 Gb/s. RocketIO GTX transceivers are designed to run from 150 Mb/s to
6.5 Gb/s.
This number does not include RocketIO transceivers.
Includes configuration Bank 0.
Configurable Logic Blocks (CLBs)
(Row x Col)
160 x 108 34,560
240 x 108 51,840
120 x 30
120 x 54
160 x 54
160 x 76
120 x 30
120 x 54
160 x 54
160 x 76
120 x 34
160 x 46
240 x 78
200 x 58
240 x 78
160 x 38
160 x 56
200 x 56
240 x 68
80 x 30
60 x 26
80 x 30
80 x 34
80 x 38
Array
Slices
Virtex-5
12,960
17,280
24,320
12,960
17,280
24,320
14,720
37,440
23,200
37,440
11,200
16,000
20,480
30,720
4,800
7,200
3,120
4,800
7,200
5,440
8,160
5,120
(1)
Distributed
RAM (Kb)
1,120
1,640
2,280
3,420
1,120
1,640
2,280
3,420
1,520
4,200
1,500
2,400
1,240
1,580
2,280
Max
320
480
840
210
320
480
840
520
780
380
820
DSP48E
Slices
1,056
128
128
192
128
128
192
192
288
640
128
256
320
384
32
48
48
64
24
32
48
48
64
80
96
64
(2)
18 Kb
1,032
192
256
384
384
576
120
216
296
424
424
648
168
264
488
456
648
136
296
456
596
912
Block RAM Blocks
64
96
52
72
(3)
36 Kb
www.xilinx.com
128
192
192
288 10,368
108
148
212
212
324 11,664
132
244
516 18,576
228
324 11,664
148
228
298 10,728
456 16,416
32
48
96
26
36
60
84
68
1,152
1,728
3,456
4,608
6,912
6,912
1,296
2,160
3,888
5,328
7,632
7,632
3,024
4,752
8,784
8,208
2,448
5,328
8,208
Max
(Kb)
936
CMTs
2
6
6
6
6
6
6
1
2
6
6
6
6
6
6
2
6
6
6
6
6
2
6
6
6
6
(4)
Processor
PowerPC
Blocks
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
1
1
2
2
2
Blocks for
Endpoint
Express
N/A
N/A
N/A
N/A
N/A
N/A
N/A
PCI
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
3
3
3
4
Ethernet
MACs
N/A
N/A
N/A
N/A
N/A
N/A
N/A
2
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
6
8
DS100 (v5.0) February 6, 2009
(5)
Transceivers
Max RocketIO
GTP
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
12
12
16
16
16
24
12
16
24
4
8
8
Product Specification
GTX
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
40
48
16
16
20
24
8
(6)
Banks
Total
I/O
13
17
17
23
23
23
33
12
15
15
20
20
20
27
12
15
19
27
20
20
12
19
20
24
27
7
(8)
1,200
I/O
User
Max
400
560
560
800
800
800
172
360
480
480
680
680
680
960
360
480
640
960
680
680
360
640
680
840
960
(7)
R