MCP23S18T-E/SO Microchip Technology, MCP23S18T-E/SO Datasheet
MCP23S18T-E/SO
Specifications of MCP23S18T-E/SO
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MCP23S18T-E/SO Summary of contents
Page 1
... Multi-bit ADDR Decode RESET INTA Interrupt INTB Logic © 2008 Microchip Technology Inc. MCP23018/MCP23S18 • Configurable interrupt source: - Interrupt-on-change from configured defaults or pin change • Polarity inversion register to configure the polarity of the input port data • External reset input • Low standby current µ ...
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... INTB SCL 11 NC SDA 12 RESET ADDR QFN GPB1 GPA3 1 18 GPB2 GPA2 GPB3 GPA1 GPB4 GPA0 4 15 GPB5 INTA 5 14 GPB6 INTB 6 13 SSOP 24 GPA7 23 GPA6 22 GPA5 21 GPA4 20 GPA3 19 GPA2 18 GPA1 17 GPA0 16 INTA 15 INTB 14 RESET 13 ADDR © 2008 Microchip Technology Inc. ...
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... Package Types: PDIP/SOIC GPB0 3 GPB1 4 GPB2 5 GPB3 6 GPB4 7 GPB5 8 GPB6 9 GPB7 SCK © 2008 Microchip Technology Inc. MCP23018/MCP23S18 MCP23S18 GPA7 26 GPA6 25 GPA5 GPB1 1 24 GPA4 GPB2 2 23 GPA3 GPB3 3 22 GPA2 GPB4 4 21 GPA1 20 GPA0 GPB5 5 19 INTA GPB6 6 18 INTB ...
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... The Power-on Reset (POR) sets the registers to their default values and initializes the device state machine. The hardware address pin is used to determine the device address. any input state differs from its © 2008 Microchip Technology Inc. ...
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... EP — 25 — © 2008 Microchip Technology Inc. MCP23018/MCP23S18 Standard Function Bidirectional I/O Pin (5.5 volt tolerant inputs; open-drain outputs). Can be enabled for interrupt on change, and/or internal pull-up resistor. Bidirectional I/O Pin (5.5 volt tolerant inputs; open-drain outputs). Can be enabled for interrupt on change, and/or internal pull-up resistor. ...
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... Bidirectional I/O Pin (5.5 volt tolerant inputs; open-drain outputs). Can be enabled for interrupt on change, and/or internal pull-up resistor 17, — Not connected 28 EP — 25 — Exposed Thermal Pad (EP). Do not electrically connect, or connect to V DS22103A-page 6 Standard Function © 2008 Microchip Technology Inc ...
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... I C byte operations and sequential operations. The © 2008 Microchip Technology Inc. MCP23018/MCP23S18 modes explained here relate to the device’s internal address pointer and whether or not it is incremented after each byte is clocked on the serial interface. ...
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... Section 1.3.1 “Byte Mode and Sequential Mode” for details regard- ing sequential operation control). The sequence ends by the raising of CS. The MCP23S18 address pointer will roll over to address zero after reaching the last register address. © 2008 Microchip Technology Inc. ...
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... Stop P - Write w - Read R - Device opcode OP ADDR - Device address - Data out from MCP23018 D OUT D - Data in to MCP23018 Byte Sequential S OP Byte S OP Sequential S OP © 2008 Microchip Technology Inc. MCP23018/MCP23S18 D IN .... W ADDR OUT .... ADDR P Byte and Sequential Write D W ADDR ADDR .... ...
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... The maximum tolerance is 20%, however recom- mended to use 5% tolerance worst case (10% total tol- erance MCP23018 V SS ADDRLAT . ). ADDIS Figure 1-2 and Figure 1-3 show how © 2008 Microchip Technology Inc. ...
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... R2=2n R2=2n © 2008 Microchip Technology Inc. MCP23018/MCP23S18 VDD= 1.8 R1=16-R2 R2/(R1+R2) V2 0.113 15 0.0625 13 0.1875 0.338 11 0.3125 0.563 0.788 9 0.4375 7 0.5625 1.013 1.238 5 0.6875 3 0.8125 1.463 1 0.9375 1.688 VDD= 2.7 R1=16-R2 R2/(R1+R2) V2 0.169 15 0.0625 13 0.1875 0.506 0.844 11 0.3125 9 0.4375 1.181 7 0.5625 1 ...
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... MCP23018/MCP23S18 FIGURE 1-4: FLASH ADC BLOCK DIAGRAM V DD analog_in adc_en gnd DS22103A-page 12 addr_out[6] d adc_en adc_en en addr_out[5] adc_en reset addr_out[4] set '0' d adc_en i2c_clk addr_out[3] adc_en addr_out[2] adc_en addr_out[1] adc_en addr_out[0] adc_en addr[6:0] i2c_addr[2:0] q adc_en q © 2008 Microchip Technology Inc. ...
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... ADDRESSING SPI DEVICES (MCP23S18) The MCP23S18 is a slave SPI device. The slave address contains seven fixed bits(no address bits) with the read/write bit filling out the control byte. shows the control byte format. © 2008 Microchip Technology Inc. MCP23018/MCP23S18 t ADDIS FIGURE 1-6: S ...
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... MCP23018/MCP23S18 2 FIGURE 1-8: I C™ ADDRESSING REGISTERS Device Opcode The ACKs are provided by the MCP23X18. FIGURE 1-9: SPI ADDRESSING REGISTERS Device Opcode DS22103A-page 14 0 ACK R Register Address 0 R Register Address ACK © 2008 Microchip Technology Inc. ...
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... OL7 OL6 OLATB 15 OL7 OL6 © 2008 Microchip Technology Inc. MCP23018/MCP23S18 The pull up resistors are individually configured and can be enabled when the pin is cofigured as an input or output. Reading the GPIOn register reads the value on the port. Reading the OLATn register only reads the latches, not the actual value on the port ...
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... DEF1 DEF0 0000 0000 IOC1 IOC0 0000 0000 INTPOL INTCC 0000 0000 PU2 PU1 PU0 0000 0000 INT1 INTO 0000 0000 ICP1 ICP0 0000 0000 GP1 GP0 0000 0000 OL2 OL1 OL0 0000 0000 © 2008 Microchip Technology Inc. ...
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... ICP6 INTCAPB 11 ICP7 ICP6 GPIOA 12 GP7 GP6 GPIOB 13 GP7 GP6 OLATA 14 OL7 OL6 OLATB 15 OL7 OL6 © 2008 Microchip Technology Inc. MCP23018/MCP23S18 bit 5 bit 4 bit 3 bit 2 IO5 IO4 IO3 IO2 IO5 IO4 IO3 IO2 IP5 IP4 IP3 IP2 IP5 IP4 IP3 ...
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... IO7:IO0: Controls the direction of data I/O <7:0> Pin is configured as an input Pin is configured as an output. DS22103A-page 18 R/W-1 R/W-1 R/W-1 IO4 IO3 IO2 U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared R/W-1 R/W-1 IO1 IO0 bit Bit is unknown © 2008 Microchip Technology Inc. ...
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... IP7:IP0: Controls the polarity inversion of the input pins <7:0> GPIO register bit will reflect the opposite logic state of the input pin GPIO register bit will reflect the same logic state of the input pin. © 2008 Microchip Technology Inc. MCP23018/MCP23S18 R/W-0 R/W-0 ...
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... Enable GPIO input pin for interrupt-on-change event 0 = Disable GPIO input pin for interrupt-on-change event. DS22103A-page 20 R/W-0 R/W-0 R/W-0 GPINT4 GPINT3 GPINT2 U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared R/W-0 R/W-0 GPINT1 GPINT0 bit Bit is unknown © 2008 Microchip Technology Inc. ...
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... DEF7:DEF0: Sets the compare value for pins configured for interrupt-on-change from defaults <7:0>. Refer to INTCON. If the associated pin level is the opposite from the register bit, an interrupt occurs. Refer to INTCON and GPINTEN. © 2008 Microchip Technology Inc. MCP23018/MCP23S18 R/W-0 R/W-0 R/W-0 ...
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... Pin value is compared against the associated bit is DEFVAL register 0 = Pin value is compared against the previous pin value. Refer to INTCON and GPINTEN. DS22103A-page 22 R/W-0 R/W-0 R/W-0 IOC4 IOC3 IOC2 U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared R/W-0 R/W-0 IOC1 IOC0 bit Bit is unknown © 2008 Microchip Technology Inc. ...
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... BANK bit is set For this reason advised to only perform byte writes to this register when changing the BANK bit. © 2008 Microchip Technology Inc. MCP23018/MCP23S18 Note: The INTB pin is not bonded out on the MCP23S18 (SPI) device in the 24-lead QFN package. The MIRROR bit must be configured to a “ ...
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... Reading INTCAP register clears the interrupt 0 = Reading GPIO register clears the interrupt DS22103A-page 24 U-0 U-0 R/W ODR U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared Figure 1-4 and Figure © 2008 Microchip Technology Inc. R/W-0 R/W-0 INTPOL INTCC bit Bit is unknown 1-5) ...
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... TYPICAL PERFORMANCE CURVE FOR THE INTERNAL PULL-UP RESISTORS GPIO Pin Internal Pull-up Current vs V 400 350 300 250 200 150 100 50 0 1.5 2 © 2008 Microchip Technology Inc. MCP23018/MCP23S18 R/W-0 R/W-0 R/W-0 PU4 PU3 U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared T = +25°C 2.5 3 3.5 ...
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... INT7:INT0: Reflects the interrupt condition on the port. Will reflect the change only if interrupts are enabled (GPINTEN) <7:0> Pin caused interrupt Interrupt not pending. DS22103A-page 26 R-0 R-0 R-0 INT4 INT3 INT2 U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared © 2008 Microchip Technology Inc. R-0 R-0 INT1 INT0 bit Bit is unknown ...
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... R = Readable bit W = Writable bit -n = Value at POR ‘1’ = Bit is set bit 7-0 ICP7:ICP0: Reflects the logic level on the port pins at the time of interrupt due to pin change <7:0> Logic-high Logic-low. © 2008 Microchip Technology Inc. MCP23018/MCP23S18 R-x R-x R-x ICP4 ICP3 ICP2 U = Unimplemented bit, read as ‘ ...
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... Bit is set bit 7-0 GP7:GP0: Reflects the logic level on the pins <7:0> Logic-high Logic-low. DS22103A-page 28 R/W-0 R/W-0 R/W-0 GP4 GP3 GP2 U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared R/W-0 R/W-0 GP1 GP0 bit Bit is unknown © 2008 Microchip Technology Inc. ...
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... Legend Readable bit W = Writable bit -n = Value at POR ‘1’ = Bit is set bit 7-0 OL7:OL0: Reflects the logic level on the output latch <7:0> Logic-high Logic-low. © 2008 Microchip Technology Inc. MCP23018/MCP23S18 R/W-0 R/W-0 R/W-0 OL4 OL3 OL2 U = Unimplemented bit, read as ‘0’ ...
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... GPIO is read before INTCAP Result while another IOC is pending. After read- Clear ing GPIO, the interrupt will clear and then Unchanged set due to the pending IOC, causing the INTCAP register to update. Unchanged Clear Unchanged Unchanged Clear © 2008 Microchip Technology Inc. ...
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... The interrupt condition will remain as long as the condition exists, regardless if the INTAP or GPIO is read. See Figure 1-11 and Figure 1-12 for more information on interrupt operations. © 2008 Microchip Technology Inc. MCP23018/MCP23S18 FIGURE 1-11: INTERRUPT-ON-PIN- CHANGE GPx INT ACTIVE Port value ...
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... MCP23018/MCP23S18 NOTES: DS22103A-page 32 © 2008 Microchip Technology Inc. ...
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... This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. © 2008 Microchip Technology Inc. MCP23018/MCP23S18 ..................................................................................................... -0.3V to +14V (except V and GPIOA/B) ...
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... T ≤ +85°C µA A +85°C ≤ T ≤ +125°C µ ≤ V ≤ V µ PIN DD ≤ V ≤ V µ PIN DD µ 5V, GP Pins = Note 8 (open-drain 1 3 3 -3 -400 µ 1. © 2008 Microchip Technology Inc. ...
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... POR at device power up POR 34 Tio Output Hi-impedance from Z RESET Low Note 1: This parameter is characterized, not 100% tested. 2: Data in the Typical (“Typ”) column is at 5V, +25°C, unless otherwise stated. © 2008 Microchip Technology Inc. MCP23018/MCP23S18 V DD Pin 1 kΩ 135 ≤ +125°C. ...
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... Min Typ Max — — 500 — — 600 — 450 — — — 600 — — LSb of data byte zero during a write or read command, depending on parameter 50 51 INT pin inactive 53 52 Units Conditions Note Note 1 © 2008 Microchip Technology Inc. ...
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... This parameter is characterized, not 100% tested. 2: Data in the Typical (“Typ”) column is at 5V, +25°C, unless otherwise stated.. FIGURE 2-4: HARDWARE ADDRESS LATCH TIMING adc_en i2c_addr[2:0] SCL © 2008 Microchip Technology Inc. MCP23018/MCP23S18 ≤ +125° Min Typ Max stable after — 0 — — ...
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... Condition Note 1: Refer to Figure 2-1 for load conditions. 2 FIGURE 2- BUS DATA TIMING 103 SCL 90 91 SDA In 109 SDA Out Note 1: Refer to Figure 2-1 DS22103A-page 38 100 101 106 107 109 for load conditions STOP Condition 102 92 110 © 2008 Microchip Technology Inc. ...
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... MHz mode Note 1: This parameter is characterized, not 100% tested specified from 10 to 400 (pF This parameter is not applicable in high-speed mode (3.4 MHz). © 2008 Microchip Technology Inc. MCP23018/MCP23S18 Operating Conditions (unless otherwise indicated): 1.8V ≤ V ≤ 5.5V at -40°C ≤ T ≤ +125° (SCL, SDA kΩ ...
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... Units Conditions µs 1.8V – 5.5V 0.9 µs 1.8V – 5.5V µs 2.7V – 5.5V — µs 1.8V – 5.5V — µs 1.8V – 5.5V µs 2.7V – 5.5V 400 pF (Note 1) pF (Note (Note (Note LSB in © 2008 Microchip Technology Inc. ...
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... FIGURE 2-8: SPI OUTPUT TIMING SCK 12 SO MSB out SI © 2008 Microchip Technology Inc. MCP23018/MCP23S18 13 don’t care 2 Mode 1,1 Mode 0,0 14 LSB out DS22103A-page 41 ...
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... T = +125° +85° +25°C 2 (V) DD Conditions 1.8V – 5. 1.8V – 5.5V ns 1.8V – 5.5V ns 1.8V – 5.5V ns 1.8V – 5.5V µs Note 1 µs Note 1 ns 1.8V – 5.5V ns 1.8V – 5. 1.8V – 5. 4.5 5 5.5 © 2008 Microchip Technology Inc. ...
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... Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. © 2008 Microchip Technology Inc. MCP23018/MCP23S18 Example 23018 e ...
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... MCP23018/MCP23S18 Package Marking Information (Continued) 28-Lead SPDIP (300 mil) XXXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXXX YYWWNNN 28-Lead SOIC (300 mil) XXXXXXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXXXXXX YYWWNNN DS22103A-page 44 Example: MCP23018 e E/SP^^ 3 0838256 Example: MCP23018 e E/SO^^ 3 YYWW NNN © 2008 Microchip Technology Inc. ...
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... Plastic Quad Flat, No Lead Package (MJ) – 4x4x0.9 mm Body [QFN] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging © 2008 Microchip Technology Inc. MCP23018/MCP23S18 DS22103A-page 45 ...
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... MCP23018/MCP23S18 1RWH DS22103A-page 46 © 2008 Microchip Technology Inc. ...
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... NOTE 1RWHV © 2008 Microchip Technology Inc. MCP23018/MCP23S18 PP %RG\ >6623 φ L DS22103A-page 47 ...
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... MCP23018/MCP23S18 /HDG 6NLQQ\ 3ODVWLF 'XDO ,Q /LQH 63 ± 1RWH N NOTE 1RWHV DS22103A-page 48 PLO %RG\ >63', © 2008 Microchip Technology Inc. c ...
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... D N NOTE 1RWHV © 2008 Microchip Technology Inc. MCP23018/MCP23S18 PP %RG\ >62,& α h φ β DS22103A-page 49 ...
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... MCP23018/MCP23S18 NOTES: DS22103A-page 50 © 2008 Microchip Technology Inc. ...
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... APPENDIX A: REVISION HISTORY Revision A (September 2008) • Original Release of this Document. © 2008 Microchip Technology Inc. MCP23018/MCP23S18 DS22103A-page 51 ...
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... MCP23018/MCP23S18 NOTES: DS22103A-page 52 © 2008 Microchip Technology Inc. ...
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... MCP23018-E/SS: e) MCP23018T-E/SS: Tape and Reel, f) MCP23018-E/MJ: a) MCP23S18-E/SP: Extended Temp., b) MCP23S18-E/SO: Extended Temp., c) MCP23S18T-E/SO: Tape and Reel, d) MCP23S18T-E/MJ: Tape and Reel, Extended Temp., 28LD SPDIP package. 28LD SOIC package. Extended Temp., 28LD SOIC package. Extended Temp., 24LD SSOP package. Extended Temp., 24LD SSOP package. ...
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... MCP23018/MCP23S18 NOTES: DS22103A-page 54 © 2008 Microchip Technology Inc. ...
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... PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Total Endurance, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...
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