MCP4812T-E/MS Microchip Technology, MCP4812T-E/MS Datasheet - Page 19

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MCP4812T-E/MS

Manufacturer Part Number
MCP4812T-E/MS
Description
Dual 10-bit DAC With SPI Interace And Internal Vref 8 MSOP 3x3mm T/R
Manufacturer
Microchip Technology
Datasheet

Specifications of MCP4812T-E/MS

Settling Time
4.5µs
Number Of Bits
10
Data Interface
Serial, SPI™
Number Of Converters
2
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power Dissipation (max)
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCP4812T-E/MS
Manufacturer:
MICROCHIP
Quantity:
12 000
Part Number:
MCP4812T-E/MS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
4.1.3
The internal Power-on Reset (POR) circuit monitors the
power supply voltage (V
operation. The circuit also ensures that the DAC
powers up with high output impedance (<SHDN> = 0,
typically 500 k. The devices will continue to have a
high-impedance output until a valid write command is
received and the LDAC pin meets the input low
threshold.
If the power supply voltage is less than the POR
threshold (V
in their Reset state. The DACs will remain in that state
until V
received.
Figure 4-3
pulse and the duration required to cause a reset to
occur, as well as the relationship between the duration
and trip voltage. A 0.1 µF decoupling capacitor,
mounted as close as possible to the V
provide additional transient immunity.
FIGURE 4-3:
 2010 Microchip Technology Inc.
DD
> V
10
5V
shows a typical power supply transient
8
6
4
2
0
POWER-ON RESET CIRCUIT
POR
POR
Transients below the curve
will NOT cause a reset
= 2.0V, typical), the DACs will be held
and a subsequent write command is
1
V
Transients above the curve
will cause a reset
DD
Typical Transient Response.
T
Time
A
2
- V
= +25°C
POR
DD
Transient Duration
V
3
) during the device
DD
(V)
- V
4
POR
DD
5
V
POR
pin, can
4.1.4
The user can shut down each DAC channel selectively
using a software command (<SHDN> = 0). During
Shutdown mode, most of the internal circuits in the
channel that was shut down are turned off for power
savings. The internal reference is not affected by the
shutdown command. The serial interface also remains
active, thus allowing a write command to bring the
device out of the Shutdown mode. There will be no
analog output at the channel that was shut down and
the V
load (500 k typical.
output stage during the Shutdown mode.
The device will remain in Shutdown mode until the
<SHDN> bit = 1 is latched into the device. When a
DAC channel is changed from Shutdown to Active
mode, the output settling time takes < 10 µs, but
greater than the standard active mode settling time
(4.5 µs).
FIGURE 4-4:
Mode.
MCP4802/4812/4822
Resistive String DAC
OUT
Op
Amp
pin is internally switched to a known resistive
SHUTDOWN MODE
Control Circuit
Power-Down
Output Stage for Shutdown
Figure 4-4
Resistive
Load
shows the analog
DS22249A-page 19
500 k
V
OUT

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