PIC12F675-E/MD Microchip Technology, PIC12F675-E/MD Datasheet - Page 4
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PIC12F675-E/MD
Manufacturer Part Number
PIC12F675-E/MD
Description
1.75KB Flash, 64 RAM, 6 I/O 8 DFN 4x4mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 12Fr
Datasheets
1.PIC12F629T-ISN.pdf
(136 pages)
2.PIC12F629T-ISN.pdf
(8 pages)
3.PIC12F629T-ISN.pdf
(24 pages)
Specifications of PIC12F675-E/MD
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Size
1.75KB (1K x 14)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
8-DFN
Processor Series
PIC12F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
64 B
Interface Type
RS- 232, USB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
6
Number Of Timers
2
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 53270-913
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164326 - MODULA SKT PM3 20QFN
Connectivity
-
Lead Free Status / Rohs Status
Details
PIC12F629/675/PIC16F630/676
2.0
2.1
The user memory space extends from 0x0000-0x1FFF.
In Programming mode, the program memory space
extends from 0x0000-0x3FFF, the first half (0x0000-
0x1FFF) is user program memory and the second half
(0x2000-0x3FFF) is configuration memory. The PC will
increment from 0x0000-0x1FFF and wrap to 0x000,
0x2000-0x3FFF and wrap around to 0x2000 (not to
0x0000). Once in configuration memory, the highest bit
of the PC remains a ‘1’, thus always pointing to the
configuration memory. The only way to point to the user
program memory is to reset the part and re-enter
Program/Verify mode as described in Section 2.3
“Program/Verify Mode”.
In the configuration memory space, 0x2000-0x201F are
physically implemented. However, only locations 0x2000-
0x2003 and 0x2007 are available. Other locations are
reserved.
FIGURE 2-1:
DS41191D-page 4
PROGRAM MODE ENTRY
User Program Memory Map
PROGRAM MEMORY MAPPING
2000
2001
2002
2003
2004
2005
2006
2007
03FF
Configuration Word
ID Location
ID Location
ID Location
ID Location
Reserved
Reserved
Reserved
OSCCAL
2.2
A user may store identification information (ID) in four ID
locations. The ID locations are mapped in [0x2000:
0x2003]. It is recommended that the user use only the
seven Least Significant bits (LSb) of each ID location.
Locations read out normally, even after code protection.
The ID locations read out in an unscrambled fashion
after code protection is enabled. It is recommended that
ID location is written as “xx xxxx xbbb bbbb” where
‘bbb bbbb’ is ID information.
The 14 bits may be programmed, but only the LSbs are
displayed by MPLAB
as they won’t be read by MPLAB
03FE
03FF Implemented
1FFF
3FFF
201F
2000
2008
400
Implemented
Implemented
2000-201F
ID Locations
Reserved
Maps to
Maps to
1 KW
0-3FF
®
IDE. xxxx’s are “don’t care” bits
© 2005 Microchip Technology Inc.
®
IDE.