PIC12LF1840-E/MF Microchip Technology, PIC12LF1840-E/MF Datasheet - Page 245

• Manufacturer Part Number: PIC12LF1840-E/MF
• Description: 7 KB Flash, 256 Bytes RAM, 32 MHz Int. Osc, 6 I/0, Enhanced Mid Range Core, Nano
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 12Fr

Specifications of PIC12LF1840-E/MF

• Processor Series: PIC12F
• Core: PIC
• Program Memory Type: Flash
• Program Memory Size: 7 KB
• Data Ram Size: 256 B
• Interface Type: MI2C, SPI, EUSART
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: DFN-8
• Development Tools By Supplier: MPLAB IDE Software
• Minimum Operating Temperature: - 40 C
• Core Processor: RISC
• Core Size: 8-Bit
• Speed: 32MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 5
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Lead Free Status / Rohs Status: Details

25.6.4
To initiate a Start condition, the user sets the Start
Enable bit, SEN bit of the SSP1CON2 register. If the
SDA and SCL pins are sampled high, the Baud Rate
Generator
SSP1ADD<7:0> and starts its count. If SCL and SDA
are both sampled high when the Baud Rate Generator
times out (Tpwrt), the SDA pin is driven low. The
action of the SDA being driven low while SCL is high is
the Start condition and causes the S bit of the
SSP1STAT1 register to be set. Following this, the
Baud Rate Generator is reloaded with the contents of
SSP1ADD<7:0> and resumes its count. When the
Baud Rate Generator times out (Tpwrt), the SEN bit of
the SSP1CON2 register will be automatically cleared
FIGURE 25-26:
 2011 Microchip Technology Inc.
I
CONDITION TIMING
2
C MASTER MODE START
is
reloaded
FIRST START BIT TIMING
Write to SEN bit occurs here
with
SDA
SCL
the
contents
SDA = 1,
SCL = 1
T
BRG
Preliminary
of
S
Set S bit (SSP1STAT<3>)
T
BRG
At completion of Start bit,
hardware clears SEN bit
by hardware; the Baud Rate Generator is suspended,
leaving the SDA line held low and the Start condition is
complete.
and sets SSP1IF bit
Note 1: If at the beginning of the Start condition,
Write to SSP1BUF occurs here
T
BRG
2: The Philips I
1st bit
the SDA and SCL pins are already sam-
pled low, or if during the Start condition,
the SCL line is sampled low before the
SDA line is driven low, a bus collision
occurs, the Bus Collision Interrupt Flag,
BCL1IF, is set, the Start condition is
aborted and the I
its Idle state.
bus collision cannot occur on a Start.
T
PIC12(L)F1840
BRG
2
C Specification states that a
2nd bit
2
C module is reset into
DS41441B-page 245