PIC16F1934T-I/MV Microchip Technology, PIC16F1934T-I/MV Datasheet - Page 378
![7KB Flash, 256B RAM, 256B EEPROM, LCD, 1.8-5.5V 40 UQFN 5x5x0.5mm T/R](/photos/16/12/161286/qfn44_sml.jpg)
PIC16F1934T-I/MV
Manufacturer Part Number
PIC16F1934T-I/MV
Description
7KB Flash, 256B RAM, 256B EEPROM, LCD, 1.8-5.5V 40 UQFN 5x5x0.5mm T/R
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheets
1.PIC16F722-ISS.pdf
(8 pages)
2.PIC16LF1933-ISS.pdf
(508 pages)
3.PIC16LF1933-ISS.pdf
(46 pages)
4.PIC16F1936-ISS.pdf
(2 pages)
5.PIC16F1936-ISS.pdf
(10 pages)
6.PIC16F1936-ISS.pdf
(40 pages)
7.PIC16F1936-ISS.pdf
(30 pages)
8.PIC16F1936-ISS.pdf
(12 pages)
Specifications of PIC16F1934T-I/MV
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-UFQFN Exposed Pad
Processor Series
PIC16F
Core
PIC
Data Ram Size
256 B
Interface Type
MI2C, SPI, EUSART
Number Of Timers
5
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
MPLAB IDE Software
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F1934T-I/MV
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- PIC16F722-ISS PDF datasheet
- PIC16LF1933-ISS PDF datasheet #2
- PIC16LF1933-ISS PDF datasheet #3
- PIC16F1936-ISS PDF datasheet #4
- PIC16F1936-ISS PDF datasheet #5
- PIC16F1936-ISS PDF datasheet #6
- PIC16F1936-ISS PDF datasheet #7
- PIC16F1936-ISS PDF datasheet #8
- Current page: 378 of 508
- Download datasheet (5Mb)
PIC16F193X/LF193X
SWAPF
Syntax:
Operands:
Operation:
Status Affected:
Description:
TRIS
Syntax:
Operands:
Operation:
Status Affected:
Description:
DS41364D-page 378
Swap Nibbles in f
[ label ]
0 f 127
d [0,1]
(f<3:0>) (destination<7:4>),
(f<7:4>) (destination<3:0>)
None
The upper and lower nibbles of regis-
ter ‘f’ are exchanged. If ‘d’ is ‘0’, the
result is placed in the W register. If ‘d’
is ‘1’, the result is placed in register ‘f’.
Load TRIS Register with W
[ label ] TRIS f
5 f 7
(W) TRIS register ‘f’
None
Move data from W register to TRIS
register.
When ‘f’ = 5, TRISA is loaded.
When ‘f’ = 6, TRISB is loaded.
When ‘f’ = 7, TRISC is loaded.
SWAPF f,d
Preliminary
XORLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
XORWF
Syntax:
Operands:
Operation:
Status Affected:
Description:
Exclusive OR W with f
[ label ]
0 f 127
d [0,1]
(W) .XOR. (f) destination)
Z
Exclusive OR the contents of the W
register with register ‘f’. If ‘d’ is ‘0’, the
result is stored in the W register. If ‘d’
is ‘1’, the result is stored back in regis-
ter ‘f’.
Exclusive OR literal with W
[ label ]
0 k 255
(W) .XOR. k W)
Z
The contents of the W register are
XOR’ed with the eight-bit
literal ‘k’. The result is placed in the
W register.
2009 Microchip Technology Inc.
XORWF
XORLW k
f,d
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