PIC16F506-I/MG Microchip Technology, PIC16F506-I/MG Datasheet - Page 27
![1.5 KB Flash, 67 RAM, 12 I/O, Comparator, 8bit ADC 16 QFN 3x3x0.9mm TUBE](/photos/6/90/69062/c04-142_16-qfn_sml.jpg)
PIC16F506-I/MG
Manufacturer Part Number
PIC16F506-I/MG
Description
1.5 KB Flash, 67 RAM, 12 I/O, Comparator, 8bit ADC 16 QFN 3x3x0.9mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheet
1.PIC12F510-ISN.pdf
(124 pages)
Specifications of PIC16F506-I/MG
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
POR, WDT
Number Of I /o
11
Program Memory Size
1.5KB (1K x 12)
Program Memory Type
FLASH
Ram Size
67 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
16-QFN
Processor Series
PIC16F
Core
PIC
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
Details
4.8
The INDF register is not a physical register. Addressing
INDF actually addresses the register whose address is
contained in the FSR register (FSR is a pointer). This is
indirect addressing.
4.8.1
• Register file 07 contains the value 10h
• Register file 08 contains the value 0Ah
• Load the value 07 into the FSR register
• A read of the INDF register will return the value
• Increment the value of the FSR register by one
• A read of the INDR register now will return the
Reading INDF itself indirectly (FSR = 0) will produce
00h. Writing to the INDF register indirectly results in a
no operation (although Status bits may be affected).
A simple program to clear RAM locations 10h-1Fh
using indirect addressing is shown in Example 4-1.
FIGURE 4-5:
© 2007 Microchip Technology Inc.
Bank Select
of 10h
(FSR = 08)
value of 0Ah.
Note 1:
(FSR)
6
5
Indirect Data Addressing: INDF
and FSR Registers
2:
Direct Addressing
INDIRECT ADDRESSING EXAMPLE
Location Select
For register map detail, see Figure 4-2.
Grey boxes are unimplemented and read as ‘1’.
Data
Memory
4
DIRECT/INDIRECT ADDRESSING (PIC12F510)
3
(opcode)
(1)
2
00h
0Fh
10h
1Fh
1
0
Bank 0
00
3Fh
Bank 1
01
Addresses map back to
addresses in Bank 0.
EXAMPLE 4-1:
The FSR is a 5-bit wide register. It is used in conjunc-
tion with the INDF register to indirectly address the data
memory area.
The FSR<4:0> bits are used to select data memory
addresses 00h to 1Fh.
PIC16F506 – Uses FSR<6:5>. Selects from Bank 0 to
Bank 3. FSR<7> is unimplemented, read as ‘1’.
PIC12F510 – Uses FSR<5>. Selects from Bank 0 to
Bank 1. FSR<7:6> are unimplemented, read as ‘11’.
NEXT
CONTINUE
PIC12F510/16F506
MOVLW
MOVWF
CLRF
INCF
BTFSC
GOTO
:
:
0x10
FSR
INDF
FSR,F
FSR,4
NEXT
HOW TO CLEAR RAM
USING INDIRECT
ADDRESSING
6
Indirect Addressing
Bank
Select
5
;initialize pointer
;to RAM
;clear INDF register
;inc pointer
;all done?
;NO, clear next
;YES, continue
4
(FSR)
3
DS41268D-page 25
Location Select
2
1
0