PIC16F722-E/MV Microchip Technology, PIC16F722-E/MV Datasheet - Page 231
PIC16F722-E/MV
Manufacturer Part Number
PIC16F722-E/MV
Description
3.5 KB Flash, 1.8V-5.5V, 16 MHz Int. Osc 28 UQFN 4x4x0.5mm TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheets
1.AC164112.pdf
(302 pages)
2.PIC16F722-ISS.pdf
(10 pages)
3.PIC16F722-ISS.pdf
(2 pages)
4.PIC16F722-ISS.pdf
(8 pages)
Specifications of PIC16F722-E/MV
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 11x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-UFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- AC164112 PDF datasheet
- PIC16F722-ISS PDF datasheet #2
- PIC16F722-ISS PDF datasheet #3
- PIC16F722-ISS PDF datasheet #4
- Current page: 231 of 302
- Download datasheet (5Mb)
TABLE 23-8:
FIGURE 23-12:
© 2009 Microchip Technology Inc.
Standard Operating Conditions (unless otherwise stated)
Operating temperature
AD130* T
AD131
AD132* T
Note 1: The ADRES register may be read on the following T
Param
No.
Note 1: If the A/D clock source is selected as RC, a time of T
*
†
A/D Data
A/D CLK
BSF ADCON0, GO
ADRES
Sample
T
These parameters are characterized but not tested.
Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
Sym.
AD
CNV
ACQ
ADIF
GO
AD134
SLEEP instruction to be executed.
Q4
A/D Clock Period
A/D Internal RC Oscillator
Period
Conversion Time (not including
Acquisition Time)
Acquisition Time
PIC16F72X A/D CONVERSION REQUIREMENTS
AD132
PIC16F72X A/D CONVERSION TIMING (NORMAL MODE)
-40°C ≤ T
Characteristic
(1)
A
≤ +125°C
(T
OSC
/2
(1)
)
7
OLD_DATA
Min.
1.0
1.0
—
—
6
AD131
PIC16F72X/PIC16LF72X
CY
Sampling Stopped
Typ†
10.5
5
2.0
1.0
—
cycle.
CY
is added before the A/D clock starts. This allows the
4
AD130
Max.
9.0
6.0
—
—
3
Units
T
μs
μs
μs
AD
2
T
ADCS<1:0> = 11 (ADRC mode)
Set GO/DONE bit to conversion
complete
OSC
-based
1
0
Conditions
NEW_DATA
DS41341E-page 231
DONE
1 T
CY
1 T
CY
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