PIC16LF1519-E/MV Microchip Technology, PIC16LF1519-E/MV Datasheet - Page 88
PIC16LF1519-E/MV
Manufacturer Part Number
PIC16LF1519-E/MV
Description
40-pin, 28KB Flash, 1024B RAM, 10-bit ADC, 2xCCP, SPI, MI2C, EUSART, 1.8V-3.6V 4
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheet
1.PIC16LF1517-IPT.pdf
(344 pages)
Specifications of PIC16LF1519-E/MV
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
28KB (16K x 14)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 28x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
*
Processor Series
PIC16LF151x
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
36
Number Of Timers
3
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
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PIC16(L)F1516/7/8/9
8.1.1
When global interrupts are disabled (GIE cleared) and
any interrupt source has both its interrupt enable bit
and interrupt flag bit set, one of the following will occur:
• If the interrupt occurs before the execution of a
FIGURE 8-1:
DS41452A-page 88
Instruction Flow
SLEEP instruction
- SLEEP instruction will execute as a NOP
- WDT and WDT prescaler will not be cleared
- TO bit of the STATUS register will not be set
- PD bit of the STATUS register will not be
(INTCON reg.)
Note
Interrupt flag
GIE bit
Instruction
Fetched
Instruction
Executed
CLKOUT
cleared
OSC1
1:
2:
3:
4:
PC
(1)
(2)
WAKE-UP USING INTERRUPTS
XT, HS or LP Oscillator mode assumed.
CLKOUT is not available in XT, HS or LP Oscillator modes, but shown here for timing reference.
T
GIE = 1 assumed. In this case after wake-up, the processor calls the ISR at 0004h. If GIE = 0, execution will continue in-line.
OST
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1
Inst(PC) = Sleep
Inst(PC - 1)
= 1024 T
PC
WAKE-UP FROM SLEEP THROUGH INTERRUPT
OSC
(drawing not to scale). This delay applies only to XT, HS or LP Oscillator modes.
Inst(PC + 1)
Sleep
PC + 1
Processor in
Sleep
PC + 2
Preliminary
T
OST (3)
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
Interrupt Latency
Inst(PC + 2)
Inst(PC + 1)
• If the interrupt occurs during or after the execu-
Even if the flag bits were checked before executing a
SLEEP instruction, it may be possible for flag bits to
become set before the SLEEP instruction completes. To
determine whether a SLEEP instruction executed, test
the PD bit. If the PD bit is set, the SLEEP instruction
was executed as a NOP.
PC + 2
tion of a SLEEP instruction
- SLEEP instruction will be completely exe-
- Device will immediately wake-up from Sleep
- WDT and WDT prescaler will be cleared
- TO bit of the STATUS register will be set
- PD bit of the STATUS register will be cleared
cuted
(4)
Dummy Cycle
PC + 2
2010 Microchip Technology Inc.
Dummy Cycle
Inst(0004h)
0004h
Inst(0005h)
Inst(0004h)
0005h
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