PIC16LF1904-E/P Microchip Technology, PIC16LF1904-E/P Datasheet - Page 167

• Manufacturer Part Number: PIC16LF1904-E/P
• Description: 7KB Flash, 256B RAM, LCD, 14x10b ADC, EUSART, NanoWatt XLP 40 PDIP .600in TUBE
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16LF1904-E/P

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: LIN, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 7KB (4K x 14)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

18.3
The Baud Rate Generator (BRG) is an 8-bit or 16-bit
timer that is dedicated to the support of both the
asynchronous and synchronous EUSART operation.
By default, the BRG operates in 8-bit mode. Setting the
BRG16 bit of the BAUDCON register selects 16-bit
mode.
The SPBRGH:SPBRGL register pair determines the
period of the free running baud rate timer. In
Asynchronous mode the multiplier of the baud rate
period is determined by both the BRGH bit of the TXSTA
register and the BRG16 bit of the BAUDCON register. In
Synchronous mode, the BRGH bit is ignored.
Example 18-1
mining the desired baud rate, actual baud rate, and
baud rate % error.
Typical baud rates and error values for various
Asynchronous modes have been computed for your
convenience and are shown in
advantageous to use the high baud rate (BRGH = 1),
or the 16-bit BRG (BRG16 = 1) to reduce the baud rate
error. The 16-bit BRG mode is used to achieve slow
baud rates for fast oscillator frequencies.
Writing a new value to the SPBRGH, SPBRGL register
pair causes the BRG timer to be reset (or cleared). This
ensures that the BRG does not wait for a timer overflow
before outputting the new baud rate.
TABLE 18-3:
 2011 Microchip Technology Inc.
Legend:
SYNC
0
0
0
0
1
1
EUSART Baud Rate Generator
(BRG)
x = Don’t care, n = value of SPBRGH, SPBRGL register pair
Configuration Bits
provides a sample calculation for deter-
BAUD RATE FORMULAS
BRG16
0
0
1
1
0
1
Table
BRGH
0
1
0
1
x
x
18-5. It may be
Preliminary
BRG/EUSART Mode
16-bit/Asynchronous
16-bit/Asynchronous
16-bit/Synchronous
8-bit/Asynchronous
8-bit/Asynchronous
8-bit/Synchronous
If the system clock is changed during an active receive
operation, a receive error or data loss may result. To
avoid this problem, check the status of the RCIDL bit to
make sure that the receive operation is Idle before
changing the system clock.
EXAMPLE 18-1:
Baud Rate % Error =
For a device with F
of 9600, Asynchronous mode, 8-bit BRG:
Solving for SPBRGH:SPBRGL:
ActualBaudRate
Desired Baud Rate
PIC16LF1904/6/7
SPBRGH: SPBRGL
Calc. Baud Rate Desired Baud Rate
------------------------------------------------------------------------------------------- -
=
OSC
=
=
=
=
=
-------------------------- -
64 25
16000000
CALCULATING BAUD
RATE ERROR
-------------------------------------------------------------------- -
64 [SPBRGH:SPBRG]

9615

----------------------------------
16000000
----------------------- -
----------------------- - 1

25.042
9615 9600
of 16 MHz, desired baud rate
9600

Desired Baud Rate
64
Baud Rate Formula
9600
+
=
–
F
F
1
F

OSC
OSC

-------------------------------------------- -
Desired Baud Rate
--------------------------------------------- 1
OSC
=
–
–
F
25
/[64 (n+1)]
/[16 (n+1)]
OS C
/[4 (n+1)]

DS41569A-page 167
F
=
64
O SC
0.16%
+
1

–