PIC16LF1906T-I/SO Microchip Technology, PIC16LF1906T-I/SO Datasheet - Page 30

14KB Flash, 512B RAM, LCD, 11x10b ADC, EUSART, NanoWatt XLP 28 SOIC .300in T/R

PIC16LF1906T-I/SO

Manufacturer Part Number
PIC16LF1906T-I/SO
Description
14KB Flash, 512B RAM, LCD, 11x10b ADC, EUSART, NanoWatt XLP 28 SOIC .300in T/R
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheet

Specifications of PIC16LF1906T-I/SO

Processor Series
PIC16LF
Core
PIC
Data Bus Width
8 bit
Program Memory Type
Flash
Data Ram Size
512 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
25
Number Of Timers
1 x 16-bit, 1 x 8-bit
Operating Supply Voltage
1.8 V to 5.5 V
Mounting Style
SMD/SMT
Package / Case
QFN-28
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
LIN, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
14KB (8K x 14)
Eeprom Size
-
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Lead Free Status / Rohs Status
 Details
PIC16LF1904/6/7
3.2.6
The Core Function registers listed in
addressed from any Bank.
TABLE 3-4:
DS41569A-page 30
x00h or
x80h
x01h or
x81h
x02h or
x82h
x03h or
x83h
x04h or
x84h
x05h or
x85h
x06h or
x86h
x07h or
x87h
x08h or
x88h
x09h or
x89h
x0Ah or
x8Ah
x0Bh or
x8Bh
Legend:
Addr
Bank 0-31
INDF0
INDF1
PCL
STATUS
FSR0L
FSR0H
FSR1L
FSR1H
BSR
WREG
PCLATH
INTCON
Name
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as ‘0’, r = reserved.
Shaded locations are unimplemented, read as ‘0’.
CORE FUNCTION REGISTERS
SUMMARY
CORE FUNCTION REGISTERS SUMMARY
Addressing this location uses contents of FSR0H/FSR0L to address data memory
(not a physical register)
Addressing this location uses contents of FSR1H/FSR1L to address data memory
(not a physical register)
Program Counter (PC) Least Significant Byte
Indirect Data Memory Address 0 Low Pointer
Indirect Data Memory Address 0 High Pointer
Indirect Data Memory Address 1 Low Pointer
Indirect Data Memory Address 1 High Pointer
Working Register
Bit 7
GIE
Write Buffer for the upper 7 bits of the Program Counter
Bit 6
PEIE
Table 3-4
TMR0IE
Bit 5
can be
BSR4
INTE
Bit 4
TO
Preliminary
BSR3
IOCIE
Bit 3
PD
TMR0IF
BSR2
Bit 2
Z
BSR1
Bit 1
INTF
DC
 2011 Microchip Technology Inc.
BSR0
IOCIF
Bit 0
C
xxxx xxxx
xxxx xxxx
0000 0000
---1 1000
0000 0000
0000 0000
0000 0000
0000 0000
---0 0000
0000 0000
-000 0000
0000 0000
POR, BOR
Value on
other Resets
Value on all
uuuu uuuu
uuuu uuuu
0000 0000
---q quuu
uuuu uuuu
0000 0000
uuuu uuuu
0000 0000
---0 0000
uuuu uuuu
-000 0000
0000 0000

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