PIC16LF726-E/SS Microchip Technology, PIC16LF726-E/SS Datasheet - Page 167
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
PIC16LF726-E/SS
Manufacturer Part Number
PIC16LF726-E/SS
Description
14 KB Flash, 16 MHz Int. Osc, NanoWatt XLP 28 SSOP .209in TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheet
1.AC164112.pdf
(302 pages)
Specifications of PIC16LF726-E/SS
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SSOP
Processor Series
PIC16LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
368 B
Interface Type
I2C, SCI, SPI
Maximum Clock Frequency
32 KHz
Number Of Programmable I/os
25
Number Of Timers
3
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 11 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
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17.0
The Synchronous Serial Port (SSP) module is a serial
interface useful for communicating with other peripher-
als or microcontroller devices. These peripheral
devices may be serial EEPROMs, shift registers, dis-
play drivers, A/D converters, etc. The SSP module can
operate in one of two modes:
• Serial Peripheral Interface (SPI)
• Inter-Integrated Circuit (I
17.1
The SPI mode allows 8 bits of data to be synchronously
transmitted and received, simultaneously. The SSP
module can be operated in one of two SPI modes:
• Master mode
• Slave mode
SPI is a full-duplex protocol, with all communication
being bidirectional and initiated by a master device. All
clocking is provided by the master device and all bits
are transmitted, MSb first. Care must be taken to
ensure that all devices on the SPI bus are setup to
allow all controllers to send and receive data at the
same time.
FIGURE 17-1:
© 2009 Microchip Technology Inc.
SSP MODULE OVERVIEW
SPI Mode
SPI Master SSPM<3:0> = 00xx
MSb
Serial Input Buffer
Processor 1
Shift Register
TYPICAL SPI MASTER/SLAVE CONNECTION
(SSPBUF)
(SSPSR)
2
C™)
LSb
General I/O
SCK
SDO
SDI
Serial Clock
Slave Select
(optional)
PIC16F72X/PIC16LF72X
A typical SPI connection between microcontroller
devices is shown in Figure 17-1. Addressing of more
than one slave device is accomplished via multiple
hardware slave select lines. External hardware and
additional I/O pins must be used to support multiple
slave select addressing. This prevents extra overhead
in software for communication.
For SPI communication, typically three pins are used:
• Serial Data Out (SDO)
• Serial Data In (SDI)
• Serial Clock (SCK)
Additionally, a fourth pin may be used when in a Slave
mode of operation:
• Slave Select (SS)
SDO
SCK
SDI
SS
SPI Slave SSPM<3:0> = 010x
MSb
Serial Input Buffer
Shift Register
(SSPBUF)
(SSPSR)
Processor 2
LSb
DS41341E-page 167
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