PIC18F43K20-E/MV Microchip Technology, PIC18F43K20-E/MV Datasheet - Page 127
![8KB, Flash, 768bytes-RAM, 36I/O, 8-bit Family,nanowatt XLP 40 UQFN 5x5x0.5mm TUB](/photos/16/15/161538/qfn-40_sml.jpg)
PIC18F43K20-E/MV
Manufacturer Part Number
PIC18F43K20-E/MV
Description
8KB, Flash, 768bytes-RAM, 36I/O, 8-bit Family,nanowatt XLP 40 UQFN 5x5x0.5mm TUB
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet
1.PIC18F25K20T-ISS.pdf
(456 pages)
Specifications of PIC18F43K20-E/MV
Processor Series
PIC18
Core
PIC18F
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
8 KB
Data Ram Size
512 B
Interface Type
I2C, SPI, SCI, USB, MSSP, RJ11
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
35
Number Of Timers
4
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
UQFN-40
Development Tools By Supplier
MPLAB Integrated Development Environment
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 125 C
Supply Current (max)
30 uA
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
35
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Lead Free Status / Rohs Status
Details
- Current page: 127 of 456
- Download datasheet (4Mb)
10.4
PORTC is an 8-bit wide, bidirectional port. The corre-
sponding data direction register is TRISC. Setting a
TRISC bit (= 1) will make the corresponding PORTC
pin an input (i.e., disable the output driver). Clearing a
TRISC bit (= 0) will make the corresponding PORTC
pin an output (i.e., enable the output driver and put the
contents of the output latch on the selected pin).
The Data Latch register (LATC) is also memory
mapped. Read-modify-write operations on the LATC
register read and write the latched output value for
PORTC.
PORTC is multiplexed with several peripheral functions
(Table 10-5). The pins have Schmitt Trigger input buf-
fers. RC1 is the default configuration for the CCP2
peripheral pin. The CCP2 function can be relocated to
the RB3 pin by clearing the CCP2MX bit of Configura-
tion Word CONFIG3H. The default state of the
CCP2MX Configuration bit is ‘1’.
When enabling peripheral functions, care should be
taken in defining TRIS bits for each PORTC pin. The
EUSART and MSSP peripherals override the TRIS bit
to make a pin an output or an input, depending on the
peripheral configuration. Refer to the corresponding
peripheral section for additional information.
The contents of the TRISC register are affected by
peripheral overrides. Reading TRISC always returns
the current contents, even though a peripheral device
may be overriding one or more of the pins.
2010 Microchip Technology Inc.
Note:
PORTC, TRISC and LATC
Registers
On a Power-on Reset, these pins are con-
figured as digital inputs.
EXAMPLE 10-3:
PIC18F2XK20/4XK20
CLRF
CLRF
MOVLW
MOVWF
PORTC
LATC
0CFh
TRISC
; Initialize PORTC by
; clearing output
; data latches
; Alternate method
; to clear output
; data latches
; Value used to
; initialize data
; direction
; Set RC<3:0> as inputs
; RC<5:4> as outputs
; RC<7:6> as inputs
INITIALIZING PORTC
DS41303G-page 127
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