PIC18F45K80-E/ML Microchip Technology, PIC18F45K80-E/ML Datasheet - Page 372
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PIC18F45K80-E/ML
Manufacturer Part Number
PIC18F45K80-E/ML
Description
ECAN, 32KB Flash, 4KB RAM, 16 MIPS, 12-bit ADC, CTMU 44 QFN 8x8x0.9mm TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet
1.PIC18F25K80-ISO.pdf
(628 pages)
Specifications of PIC18F45K80-E/ML
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
ECAN, I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.6K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 11x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
*
Processor Series
PIC18F45K80
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
35
Number Of Timers
5
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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PIC18F66K80 FAMILY
23.3
For the A/D Converter to meet its specified accuracy,
the Charge Holding (C
to fully charge to the input channel voltage level. The
analog input model is shown in
source impedance (R
switch (R
required to charge the capacitor C
switch (R
(V
The source impedance affects the offset voltage at the
analog input (due to pin leakage current). The maxi-
mum recommended impedance for analog sources
is 2.5 k . After the analog input channel is selected or
changed, the channel must be sampled for at least the
minimum acquisition time before starting a conversion.
EQUATION 23-1:
EQUATION 23-2:
EQUATION 23-3:
DS39977C-page 372
T
V
or
T
T
T
T
Temperature coefficient is only required for temperatures > 25C. Below 25C, T
T
T
ACQ
DD
Note:
C
ACQ
AMP
COFF
C
ACQ
HOLD
).
=
=
A/D Acquisition Requirements
SS
=
=
=
=
=
SS
=
=
When the conversion is started, the
holding capacitor is disconnected from the
input pin.
) impedance varies over the device voltage
Amplifier Settling Time + Holding Capacitor Charging Time + Temperature Coefficient
T
) impedance directly affect the time
AMP
T
0.2 s
(Temp – 25C)(0.02 s/C)
(85C – 25C)(0.02 s/C)
1.2 s
-(C
-(25 pF) (1 k + 2 k + 2.5 k) ln(0.0004883) s
1.05 s
0.2 s + 1.05 s + 1.2 s
2.45 s
(V
-(C
AMP
HOLD
+ T
REF
HOLD
+ T
C
HOLD
– (V
ACQUISITION TIME
A/D MINIMUM CHARGING TIME
CALCULATING THE MINIMUM REQUIRED ACQUISITION TIME
S
+ T
)(R
C
) and the internal sampling
)(R
+ T
REF
COFF
IC
) capacitor must be allowed
IC
+ R
COFF
/2048)) • (1 – e
+ R
SS
SS
HOLD
+ R
+ R
Figure
S
S
) ln(1/2048) s
. The sampling
) ln(1/2048)
(-T
23-5. The
C
/C
HOLD
Preliminary
(R
IC
+ R
SS
+ R
S
To
Equation 23-1
that 1/2 LSb error is used (1,024 steps for the A/D). The
1/2 LSb error is the maximum error allowed for the A/D
to meet its specified resolution.
Equation 23-3
required acquisition time, T
based
assumptions:
))
C
Rs
Conversion Error 1/2 LSb
V
Temperature
)
HOLD
DD
calculate
on
COFF
shows the calculation of the minimum
the
can be used. This equation assumes
= 0 ms.
the
= 25 pF
= 2.5 k
= 3V Rss = 2 k
= 85 C (system max.)
following
minimum
2011 Microchip Technology Inc.
ACQ
. This calculation is
application
acquisition
system
time,
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