PIC18F65K22-I/MR Microchip Technology, PIC18F65K22-I/MR Datasheet - Page 156
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
PIC18F65K22-I/MR
Manufacturer Part Number
PIC18F65K22-I/MR
Description
32kB Flash, 2kB RAM, 1kB EE, NanoWatt XLP, GP 64 QFN 9x9x0.9mm TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet
1.PIC18F65K22-EMR.pdf
(550 pages)
Specifications of PIC18F65K22-I/MR
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- Current page: 156 of 550
- Download datasheet (5Mb)
PIC18F87K22 FAMILY
REGISTER 11-15: PIE6: PERIPHERAL INTERRUPT ENABLE REGISTER 6
DS39960D-page 156
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-5
bit 4
bit 3
bit 2
bit 1
bit 0
U-0
—
Unimplemented: Read as ‘0’
EEIE: Data EEDATA/Flash Write Operation Enable bit
1 = Interrupt is enabled
0 = interrupt is disabled
Unimplemented: Read as ‘0’
CMP3IE: CMP3 Enable bit
1 = Interrupt is enabled
0 = interrupt is disabled
CMP2E: CMP2 Enable bit
1 = Interrupt is enabled
0 = interrupt is disabled
CMP1IE: CMP1 Enable bit
1 = Interrupt is enabled
0 = interrupt is disabled
U-0
—
W = Writable bit
‘1’ = Bit is set
U-0
—
R/W-0
EEIE
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
—
CMP3IE
R/W-0
2009-2011 Microchip Technology Inc.
x = Bit is unknown
CMP2IE
R/W-0
CMP1IE
R/W-0
bit 0
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