PIC18F67K90-E/PT Microchip Technology, PIC18F67K90-E/PT Datasheet - Page 188
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
PIC18F67K90-E/PT
Manufacturer Part Number
PIC18F67K90-E/PT
Description
128kB Flash, 4kB RAM, 1kB EE, NanoWatt XLP, LCD 64 TQFP 10x10x1mm TRAY
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet
1.PIC18F66K90-IMR.pdf
(570 pages)
Specifications of PIC18F67K90-E/PT
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
64-TQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F67K90-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
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PIC18F87K90 FAMILY
13.1
The
displayed in
Timer1 gate.
REGISTER 13-2:
DS39957D-page 188
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1-0
Note 1:
TMR1GE
R/W-0
Timer1
Timer1 Gate Control Register
Programming the T1GCON register prior to T1CON is recommended.
Register
TMR1GE: Timer1 Gate Enable bit
If TMR1ON = 0:
This bit is ignored.
If TMR1ON = 1:
1 = Timer1 counting is controlled by the Timer1 gate function
0 = Timer1 counts regardless of the Timer1 gate function
T1GPOL: Timer1 Gate Polarity bit
1 = Timer1 gate is active-high (Timer1 counts when gate is high)
0 = Timer1 gate is active-low (Timer1 counts when gate is low)
T1GTM: Timer1 Gate Toggle Mode bit
1 = Timer1 Gate Toggle mode is enabled
0 = Timer1 Gate Toggle mode is disabled and toggle flip-flop is cleared
Timer1 gate flip-flop toggles on every rising edge.
T1GSPM: Timer1 Gate Single Pulse Mode bit
1 = Timer1 Gate Single Pulse mode is enabled and is controlling Timer1 gate
0 = Timer1 Gate Single Pulse mode is disabled
T1GGO/T1DONE: Timer1 Gate Single Pulse Acquisition Status bit
1 = Timer1 gate single pulse acquisition is ready, waiting for an edge
0 = Timer1 gate single pulse acquisition has completed or has not been started
This bit is automatically cleared when T1GSPM is cleared.
T1GVAL: Timer1 Gate Current State bit
Indicates the current state of the Timer1 gate that could be provided to TMR1H:TMR1L; unaffected by
the Timer1 Gate Enable (TMR1GE) bit.
T1GSS<1:0>: Timer1 Gate Source Select bits
11 = Comparator 2 output
10 = Comparator 1 output
01 = TMR2 to match PR2 output
00 = Timer1 gate pin
Gate
T1GPOL
R/W-0
T1GCON: TIMER1 GATE CONTROL REGISTER
Control
13-2, is used to control the
W = Writable bit
‘1’ = Bit is set
T1GTM
R/W-0
register
(T1GCON),
T1GSPM
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
T1GGO/T1DONE
R/W-0
T1GVAL
(1)
R-x
2009-2011 Microchip Technology Inc.
x = Bit is unknown
T1GSS1
R/W-0
T1GSS0
R/W-0
bit 0
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