PIC18LF13K50T-I/SO Microchip Technology, PIC18LF13K50T-I/SO Datasheet - Page 92
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PIC18LF13K50T-I/SO
Manufacturer Part Number
PIC18LF13K50T-I/SO
Description
8 KB Flash, 512 RAM, 15 I/O, 10-bit ADC, USB 2.0, NanoWatt XLP 20 SOIC .300in T/
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18F13K50-ISS.pdf
(420 pages)
2.PIC18F13K50-ISS.pdf
(40 pages)
3.PIC18F13K50-ISS.pdf
(10 pages)
4.PIC18F13K50-ISS.pdf
(2 pages)
Specifications of PIC18LF13K50T-I/SO
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
14
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SOIC (7.5mm Width)
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
EUSART, I2C, MSSP, SPI, USB
Maximum Clock Frequency
32 KHz
Number Of Programmable I/os
18
Number Of Timers
4
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM164127, DV164126
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC18F13K50-ISS PDF datasheet
- PIC18F13K50-ISS PDF datasheet #2
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PIC18F/LF1XK50
TABLE 9-3:
DS41350E-page 92
RB4/IOCB4/AN10/
SDI/SDA
RB5/IOCB5/AN11/
RX/DT
RB6/IOCB6/SCK/
SCL
RB7/IOCB7/TX/CK
Legend:
Pin
DIG = Digital level output; TTL = TTL input buffer; ST = Schmitt Trigger input buffer; ANA = Analog level input/output;
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
PORTB I/O SUMMARY
Function
IOCB4
IOCB5
IOCB6
IOCB7
AN10
AN11
SDA
SCK
RB4
RB5
RB6
SCL
RB7
SDI
RX
CK
DT
TX
Setting
TRIS
0
1
1
1
1
1
1
0
1
1
1
1
1
1
0
1
1
0
1
0
1
0
1
1
1
1
1
I/O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Type
ANA
ANA
DIG
TTL
TTL
DIG
DIG
TTL
TTL
DIG
DIG
TTL
TTL
DIG
DIG
DIG
TTL
TTL
DIG
DIG
I2C
I2C
I/O
ST
ST
ST
ST
ST
Preliminary
LATB<4> data output; not affected by analog input.
PORTB<4> data input; Programmable weak pull-up.
Interrupt-on-pin change.
ADC input channel 10.
SPI data input (MSSP module).
I
I
setting.
LATB<5> data output.
PORTB<5> data input; Programmable weak pull-up.
Interrupt-on-pin change.
ADC input channel 11.
Asynchronous serial receive data input (USART module).
Synchronous serial data output (USART module); takes priority over
port data.
Synchronous serial data input (USART module). User must configure
as an input.
LATB<6> data output.
PORTB<6> data input; Programmable weak pull-up.
Interrupt-on-pin change.
SPI clock output (MSSP module); takes priority over port data.
SPI clock input (MSSP module).
I
I
setting.
LATB<7> data output.
PORTB<7> data input; Programmable weak pull-up.
Interrupt-on-pin change.
Asynchronous serial transmit data output (USART module); takes
priority over port data. User must configure as output.
Synchronous serial clock output (USART module); takes priority over
port data.
Synchronous serial clock input (USART module).
2
2
2
2
C™ data output (MSSP module); takes priority over port data.
C™ data input (MSSP module); input type depends on module
C™ clock output (MSSP module); takes priority over port data.
C™ clock input (MSSP module); input type depends on module
Description
2010 Microchip Technology Inc.
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