PIC18LF14K50T-I/SO Microchip Technology, PIC18LF14K50T-I/SO Datasheet - Page 20

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PIC18LF14K50T-I/SO

Manufacturer Part Number
PIC18LF14K50T-I/SO
Description
16 KB Flash, 768 RAM, 15 I/O, 10-Bit ADC, USB 2.0, NanoWatt XLP 20 SOIC .300in T
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18LF14K50T-I/SO

Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
14
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SOIC (7.5mm Width)
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
EUSART, I2C, MSSP, SPI, USB
Maximum Clock Frequency
32 KHz
Number Of Programmable I/os
18
Number Of Timers
4
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM164127, DV164126
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18LF14K50T-I/SO
Manufacturer:
MICROCHIP
Quantity:
12 000
PIC18F/LF1XK50
2.6
The Oscillator Control (OSCCON)
Oscillator Control 2 (OSCCON2)
control the system clock and frequency selection
options.
REGISTER 2-1:
DS41350E-page 20
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6-4
bit 3
bit 2
bit 1-0
Note 1:
IDLEN
R/W-0
2:
3:
Oscillator Control
Reset state depends on state of the IESO Configuration bit.
Source selected by the INTSRC bit of the OSCTUNE register, see text.
Default output frequency of HFINTOSC on Reset.
IDLEN: Idle Enable bit
1 = Device enters Idle mode on SLEEP instruction
0 = Device enters Sleep mode on SLEEP instruction
IRCF<2:0>: Internal Oscillator Frequency Select bits
111 = 16 MHz
110 = 8 MHz
101 = 4 MHz
100 = 2 MHz
011 = 1 MHz
010 = 500 kHz
001 = 250 kHz
000 = 31 kHz
OSTS: Oscillator Start-up Time-out Status bit
1 = Device is running from the clock defined by FOSC<2:0> of the CONFIG1 register
0 = Device is running from the internal oscillator (HFINTOSC or LFINTOSC)
HFIOFS: HFINTOSC Frequency Stable bit
1 = HFINTOSC frequency is stable
0 = HFINTOSC frequency is not stable
SCS<1:0>: System Clock Select bits
1x = Internal oscillator block
01 = Secondary (Timer1) oscillator
00 = Primary clock (determined by CONFIG1H[FOSC<3:0>]).
IRCF2
R/W-0
OSCCON: OSCILLATOR CONTROL REGISTER
W = Writable bit
‘1’ = Bit is set
(3)
(2)
(Register
(Register
IRCF1
R/W-1
2-2) registers
2-1) and the
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
IRCF0
R/W-1
Preliminary
(1)
OSTS
R-q
(1)
HFIOFS
R-0
 2010 Microchip Technology Inc.
q = depends on condition
x = Bit is unknown
R/W-0
SCS1
R/W-0
SCS0
bit 0

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