PIC18LF23K22-E/SO Microchip Technology, PIC18LF23K22-E/SO Datasheet - Page 130
![8KB, Flash, 768bytes-RAM,8-bit Family,nanoWatt XLP 28 SOIC .300in TUBE](/photos/28/69/286927/28-soic_m28b_sml.jpg)
PIC18LF23K22-E/SO
Manufacturer Part Number
PIC18LF23K22-E/SO
Description
8KB, Flash, 768bytes-RAM,8-bit Family,nanoWatt XLP 28 SOIC .300in TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet
1.PIC18F26J13-ISS.pdf
(496 pages)
Specifications of PIC18LF23K22-E/SO
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 19x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SOIC (0.300", 7.50mm Width)
Processor Series
PIC18LF
Core
PIC
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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PIC18(L)F2X/4XK22
REGISTER 9-17:
REGISTER 9-18:
DS41412D-page 130
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-3
bit 2
bit 1
bit 0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-3
bit 2
bit 1
bit 0
U-0
U-0
—
—
Unimplemented: Read as ‘0’
CCP5IP: CCP5 Interrupt Priority bit
1 = High priority
0 = Low priority
CCP4IP: CCP4 Interrupt Priority bit
1 = High priority
0 = Low priority
CCP3IP: CCP3 Interrupt Priority bit
1 = High priority
0 = Low priority
Unimplemented: Read as ‘0’
TMR6IP: TMR6 to PR6 Match Interrupt Priority bit
1 = High priority
0 = Low priority
TMR5IP: TMR5 Overflow Interrupt Priority bit
1 = High priority
0 = Low priority
TMR4IP: TMR4 to PR4 Match Interrupt Priority bit
1 = High priority
0 = Low priority
U-0
U-0
—
—
IPR4: PERIPHERAL INTERRUPT PRIORITY REGISTER 4
IPR5: PERIPHERAL INTERRUPT PRIORITY REGISTER 5
W = Writable bit
W = Writable bit
‘1’ = Bit is set
‘1’ = Bit is set
U-0
U-0
—
—
U-0
U-0
Preliminary
—
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
U-0
—
—
CCP5IP
TMR6IP
R/W-0
R/W-0
2010 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
CCP4IP
TMR5IP
R/W-0
R/W-0
CCP3IP
TMR4IP
R/W-0
R/W-0
bit 0
bit 0
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