PIC18LF26K80T-I/SS Microchip Technology, PIC18LF26K80T-I/SS Datasheet - Page 439
![ECAN, 64KB Flash, 4KB RAM, 16 MIPS, 12-bit ADC, CTMU, NanoWatt XLP 28 SSOP .209i](/photos/16/9/160971/ssop-28_sml.jpg)
PIC18LF26K80T-I/SS
Manufacturer Part Number
PIC18LF26K80T-I/SS
Description
ECAN, 64KB Flash, 4KB RAM, 16 MIPS, 12-bit ADC, CTMU, NanoWatt XLP 28 SSOP .209i
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet
1.PIC18F25K80-ISO.pdf
(628 pages)
Specifications of PIC18LF26K80T-I/SS
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
ECAN, I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.6K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Processor Series
PIC18LF26K80
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
24
Number Of Timers
5
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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REGISTER 27-57: PIE5: PERIPHERAL INTERRUPT ENABLE REGISTER 5
2011 Microchip Technology Inc.
Mode 0
Mode 1
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
In CAN Mode 1 and 2, these bits are forced to ‘ 0 ’.
bit 7
IRXIE: CAN Bus Error Message Received Interrupt Enable bit
1 = Enable invalid message received interrupt
0 = Disable invalid message received interrupt
WAKIE: CAN bus Activity Wake-up Interrupt Enable bit
1 = Enable bus activity wake-up interrupt
0 = Disable bus activity wake-up interrupt
ERRIE: CAN bus Error Interrupt Enable bit
1 = Enable CAN module error interrupt
0 = Disable CAN module error interrupt
When CAN is in Mode 0:
TXB2IE: CAN Transmit Buffer 2 Interrupt Enable bit
1 = Enable Transmit Buffer 2 interrupt
0 = Disable Transmit Buffer 2 interrupt
When CAN is in Mode 1 or 2:
TXBnIE: CAN Transmit Buffer Interrupts Enable bit
1 = Enable transmit buffer interrupt; individual interrupt is enabled by TXBIE and BIE0
0 = Disable all transmit buffer interrupts
TXB1IE: CAN Transmit Buffer 1 Interrupt Enable bit
1 = Enable Transmit Buffer 1 interrupt
0 = Disable Transmit Buffer 1 interrupt
TXB0IE: CAN Transmit Buffer 0 Interrupt Enable bit
1 = Enable Transmit Buffer 0 interrupt
0 = Disable Transmit Buffer 0 interrupt
When CAN is in Mode 0:
RXB1IE: CAN Receive Buffer 1 Interrupt Enable bit
1 = Enable Receive Buffer 1 interrupt
0 = Disable Receive Buffer 1 interrupt
When CAN is in Mode 1 or 2:
RXBnIE: CAN Receive Buffer Interrupts Enable bit
1 = Enable receive buffer interrupt; individual interrupt is enabled by BIE0
0 = Disable all receive buffer interrupts
When CAN is in Mode 0:
RXB0IE: CAN Receive Buffer 0 Interrupt Enable bit
1 = Enable Receive Buffer 0 interrupt
0 = Disable Receive Buffer 0 interrupt
When CAN is in Mode 1:
Unimplemented: Read as ‘ 0 ’
When CAN is in Mode 2:
FIFOWMIE: FIFO Watermark Interrupt Enable bit
1 = Enable FIFO watermark interrupt
0 = Disable FIFO watermark interrupt
R/W-x
R/W-x
IRXIE
IRXIE
WAKIE
WAKIE
R/W-x
R/W-x
W = Writable bit
‘1’ = Bit is set
ERRIE
ERRIE
R/W-x
R/W-x
Preliminary
TXB2IE
TXBnIE
R/W-x
R/W-x
PIC18F66K80 FAMILY
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
(1)
(1)
TXB1IE
TXB1IE
R/W-x
R/W-x
(1)
(1)
TXB0IE
TXB0IE
R/W-x
R/W-x
(1)
(1)
x = Bit is unknown
RXB1IE
RXBnIE
R/W-x
R/W-x
DS39977C-page 439
FIFOWMIE
RXB0IE
R/W-x
R/W-x
bit 0
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