PIC18LF43K22-I/MV Microchip Technology, PIC18LF43K22-I/MV Datasheet - Page 284
![8KB, Flash, 512bytes-RAM,8-bit Family,nanoWatt XLP 40 UQFN 5x5x0.5mm TUBE](/photos/39/71/397183/pic18_sml.jpg)
PIC18LF43K22-I/MV
Manufacturer Part Number
PIC18LF43K22-I/MV
Description
8KB, Flash, 512bytes-RAM,8-bit Family,nanoWatt XLP 40 UQFN 5x5x0.5mm TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet
1.PIC18F26J13-ISS.pdf
(496 pages)
Specifications of PIC18LF43K22-I/MV
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 30x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-UFQFN Exposed Pad
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
512 B
Number Of Programmable I/os
36
Number Of Timers
1 x 8-bit, 3 x 16-bit
Operating Supply Voltage
1.8 V to 5.5 V
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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PIC18(L)F2X/4XK22
16.4.1.5
1.
2.
3.
FIGURE 16-10:
FIGURE 16-11:
DS41412D-page 284
TXx/CKx pin
(SCKP = 1)
TXx/CKx pin
(SCKP = 0)
TRMT bit
RXx/DTx
pin
Write to
TXREGx Reg
TXxIF bit
(Interrupt Flag)
TXEN bit
Note:
Initialize the SPBRGHx, SPBRGx register pair
and the BRGH and BRG16 bits to achieve the
desired baud rate (see
Baud Rate Generator
Set the RXx/DTx and TXx/CKx TRIS controls to
‘1’.
Enable the synchronous master serial port by
setting bits SYNC, SPEN and CSRC. Set the
TRIS bits corresponding to the RXx/DTx and
TXx/CKx I/O pins.
‘1’
Synchronous Master Transmission
Setup:
Sync Master mode, SPBRGx = 0, continuous transmission of two 8-bit words.
Write Word 1
TXREGx reg
RXx/DTx pin
TXx/CKx pin
TRMT bit
TXxIF bit
TXEN bit
Write to
SYNCHRONOUS TRANSMISSION
SYNCHRONOUS TRANSMISSION (THROUGH TXEN)
bit 0
Section 16.3 “EUSART
(BRG)”).
Write Word 2
bit 1
Word 1
bit 0
bit 2
Preliminary
bit 1
bit 7
4.
5.
6.
7.
8.
9.
Disable Receive mode by clearing bits SREN
and CREN.
Enable Transmit mode by setting the TXEN bit.
If 9-bit transmission is desired, set the TX9 bit.
If interrupts are desired, set the TXxIE, GIE/
GIEH and PEIE/GIEL interrupt enable bits.
If 9-bit transmission is selected, the ninth bit
should be loaded in the TX9D bit.
Start transmission by loading data to the
TXREGx register.
bit 2
bit 0
Word 2
bit 1
bit 6
2010 Microchip Technology Inc.
bit 7
bit 7
‘1’
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