PIC18LF4458-I/ML Microchip Technology, PIC18LF4458-I/ML Datasheet - Page 8
![24KB Flash, 2KB RAM, 256 Bytes EEPROM, 35 I/O, USB, 12bit ADC 44 QFN 8x8x0.9mm T](/photos/6/81/68122/150-44-qfn_sml.jpg)
PIC18LF4458-I/ML
Manufacturer Part Number
PIC18LF4458-I/ML
Description
24KB Flash, 2KB RAM, 256 Bytes EEPROM, 35 I/O, USB, 12bit ADC 44 QFN 8x8x0.9mm T
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F2221-ISO.pdf
(46 pages)
2.PIC18F2458-ISO.pdf
(46 pages)
3.PIC18F2458-ISO.pdf
(6 pages)
4.PIC18F2458-ISO.pdf
(6 pages)
5.PIC18F2458-ISO.pdf
(6 pages)
Specifications of PIC18LF4458-I/ML
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
24KB (12K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 13x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC18F2XXX/4XXX FAMILY
For PIC18F2480/4480 devices, the code memory
space extends from 0000h to 03FFFh (16 Kbytes) in
one 16-Kbyte block. For PIC18F2580/4580 devices,
the code memory space extends from 0000h to
07FFFh
Addresses, 0000h through 07FFh, however, define a
“Boot Block” region that is treated separately from
Block 0. All of these blocks define code protection
boundaries within the code memory space.
The size of the Boot Block in PIC18F2480/2580/4480/
4580 devices can be configured as 1 or 2K words (see
Figure
the Configuration register, CONFIG4L. It is important to
note that increasing the size of the Boot Block
decreases the size of Block 0.
FIGURE 2-7:
DS39622L-page 8
Note:
3FFFFFh
01FFFFh
000000h
200000h
2-7). This is done through the BBSIZ<0> bit in
*
(32 Kbytes)
Sizes of memory areas are not to scale.
Boot Block size is determined by the BBSIZ<0> bit in the CONFIG4L register.
Unimplemented
Code Memory
Configuration
Read as ‘0’
and ID
Space
MEMORY MAP AND THE CODE MEMORY SPACE
FOR PIC18F2480/2580/4480/4580 DEVICES
in
two
16-Kbyte
blocks.
Boot Block*
Block 0
1
Unimplemented
(PIC18FX580)
Reads all ‘0’s
32 Kbytes
Block 2
Block 3
Boot Block*
TABLE 2-6:
MEMORY SIZE/DEVICE
Block 0
0
PIC18F2480
PIC18F4480
PIC18F2580
PIC18F4580
BBSIZ<0>
Device
Block 1
Boot Block*
Block 0
IMPLEMENTATION OF CODE
MEMORY
1
Unimplemented
(PIC18FX480)
Reads all ‘0’s
16 Kbytes
2010 Microchip Technology Inc.
Code Memory Size (Bytes)
000000h-003FFFh (16K)
000000h-007FFFh (32K)
Boot Block*
Block 0
0
Address
000000h
0007FFh
000800h
000FFFh
001000h
001FFFh
002000h
003FFFh
004000h
005FFFh
006000h
007FFFh
01FFFFh
Range