PIC24F04KA200T-I/ST Microchip Technology, PIC24F04KA200T-I/ST Datasheet - Page 4

• Manufacturer Part Number: PIC24F04KA200T-I/ST
• Description: PIC24F Core, 4KB Flash, 512B RAM, 3V, Deep Sleep, 10-bit 500ksps ADC, CTMU, UART
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 24Fr

Specifications of PIC24F04KA200T-I/ST

• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 12
• Program Memory Size: 4KB (1.375K x 24)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 14-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC24FXXKA2XX
3.0
The ICSP method is a special programming protocol
that allows reading and writing to the PIC24FXXKA2XX
device family memory. This is accomplished by apply-
ing control codes and instructions, serially to the
device, using PGCx and PGDx pins.
In ICSP mode, the system clock is taken from the
PGCx pin, regardless of the device‘s oscillator
Configuration bits. All of the instructions are shifted
serially to an internal buffer, loaded into the Instruction
Register (IR) and then executed. No program is fetched
from the internal memory. Instructions are fed in 24 bits
at a time. PGDx is used to shift data in, and PGCx is
used as both the serial shift clock and the CPU
execution clock.
3.1
Figure 3-1
programming process.
After entering the ICSP mode, perform the following:
1.
2.
3.
4.
3.2
Upon entry into ICSP mode, the CPU is Idle. An
internal state machine governs the execution of the
CPU. A 4-bit control code is clocked in, using PGCx
and PGDx, and this control code is used to command
the CPU (see
The SIX control code is used to send instructions to the
CPU for execution, and the REGOUT control code is
used to read data out of the device via the VISI register.
DS39991A-page 4
Note:
Bulk Erase the device.
Program and verify the code memory.
Program and verify the device configuration.
Program the code-protect Configuration bits if
required.
ICSP PROGRAMMING
Overview of the Programming
Process
ICSP Operation
illustrates the high-level overview of the
During ICSP operation, the operating
frequency of PGCx should not exceed
8 MHz.
Table
3-1).
FIGURE 3-1:
TABLE 3-1:
0000
0001
0010-1111
Control Code
4-Bit
Program Configuration Bits
SIX
REGOUT
N/A
Mnemonic
Verify Configuration Bits
CPU CONTROL CODES IN
ICSP™ MODE
Enter ICSP™ Mode
Program Memory
Exit ICSP Mode
Verify Program
Perform Bulk
HIGH–LEVEL ICSP™
PROGRAMMING FLOW
 2010 Microchip Technology Inc.
Erase
Start
End
Shift in 24-bit instruction
and execute.
Shift out the VISI
(0784h) register.
This is reserved.
Description