PIC24F16KA304T-I/PT Microchip Technology, PIC24F16KA304T-I/PT Datasheet - Page 3

• Manufacturer Part Number: PIC24F16KA304T-I/PT
• Description: 16KB Flash, 2KB RAM, 512B EEPROM, 16 MIPS, 12-bit ADC, CTMU, XLP 44 TQFP 10x10x1
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 24Fr

Specifications of PIC24F16KA304T-I/PT

• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 39
• Program Memory Size: 16KB (5.5K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Silicon Errata Issues
1. Module: Core (Low-Voltage Regulator)
2. Module: Reset (BOR)
 2011 Microchip Technology Inc.
Note:
When operating in Low-Voltage Sleep mode,
LVREN = 1 (RCON<12>) and LVRCFG = 0
(FPOR<2>), the device may not be able to enter
programming modes using high-voltage entry
(V
Work around
If entry into a programming mode is required
while the device is in Low-Voltage Sleep mode,
use low-voltage entry into programming. Verify
that MCLR functionality is enabled, MCLRE = 1
(FPOR<7>), before attempting programming.
Affected Silicon Revisions
Under certain conditions, the device may
improperly perform a Brown-out Reset upon
wake-up from a Sleep mode. This has been
observed under two conditions:
1.
2.
BOR functions normally when it is always
enabled or disabled (BOREN<1:0> = 11 or 00).
A4
IHH
X
When the BOR is disabled in Sleep mode,
BOREN<1:0> = 10 (FPOR<1:0>), a BOR
may occur when the device wakes from
Sleep, regardless of the supply voltage.
When the BOR is configured for software
control (BOREN<1:0> = 01), the device
enters and wakes from Sleep normally
while the BOR is disabled in software,
SBOREN = 0 (RCON<13>). However, if the
BOR was disabled prior to entering Sleep
mode and is subsequently enabled after
waking from Sleep, a BOR may occur,
regardless of the supply voltage.
applied to MCLR).
This document summarizes all silicon
errata issues from all revisions of silicon,
previous as well as current. Only the
issues indicated by the shaded column in
the following tables apply to the current
silicon revision (A4).
PIC24FV32KA304 FAMILY
3. Module: A/D (Threshold Detect)
Work around
Do not use Sleep mode when BOREN<1:0> = 10.
If the BOR is to operate under software control,
always enable the HLVD module, HLVDEN = 1
(HLVDCON<15>), before enabling the BOR in
software (SBOREN = 1). This procedure acti-
vates the internal band gap reference and
assures its stability for the BOR circuit.
Affected Silicon Revisions
When the auto-scan feature of Threshold Detect
is enabled (AD1CON5<15> = 1), automatic
scan may fail when these conditions occur
together:
• the Device is in Sleep mode, and
• Timer1 is selected as the sample trigger clock
Timer1 and other timers will function correctly as
sample triggers in other power-saving modes,
such as Idle mode.
Work around
If auto-scan functionality is required during
Sleep, use INT0 as the sample trigger.
Affected Silicon Revisions
A4
A4
source (AD1CON1<7:4> = 0101).
X
X
DS80522B-page 3