PIC24FJ128DA110T-I/BG Microchip Technology, PIC24FJ128DA110T-I/BG Datasheet - Page 232
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PIC24FJ128DA110T-I/BG
Manufacturer Part Number
PIC24FJ128DA110T-I/BG
Description
16-bit, 128KB Flash, 24K RAM, USB, Graphics 121 XBGA 10x10x1.20mm T/R
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Specifications of PIC24FJ128DA110T-I/BG
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, GFX, LVD, POR, PWM, WDT
Number Of I /o
84
Program Memory Size
128KB (43K x 24)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
121-TFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24FJ128DA110T-I/BG
Manufacturer:
Microchip Technology
Quantity:
10 000
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PIC24FJ256DA210 FAMILY
17.1
The UART module includes a dedicated, 16-bit Baud
Rate Generator. The UxBRG register controls the
period of a free-running, 16-bit timer. Equation 17-1
shows the formula for computation of the baud rate with
BRGH = 0.
EQUATION 17-1:
Example 17-1 shows the calculation of the baud rate
error for the following conditions:
• F
• Desired Baud Rate = 9600
EXAMPLE 17-1:
DS39969B-page 232
Note 1:
CY
Desired Baud Rate
Solving for BRGx Value:
Calculated Baud Rate = 4000000/(16 (25 + 1))
Error
Note:
= 4 MHz
2:
UART Baud Rate Generator (BRG)
UxBRG =
Baud Rate =
F
frequency (F
Based on F
and PLL are disabled.
BRGx
BRGx
BRGx
CY
Based on F
denotes the instruction cycle clock
UART BAUD RATE WITH
BRGH = 0
BAUD RATE ERROR CALCULATION (BRGH = 0)
16 • Baud Rate
CY
16 • (UxBRG + 1)
= ((F
= ((4000000/9600)/16) – 1
= 25
= 9615
= (Calculated Baud Rate – Desired Baud Rate)
= (9615 – 9600)/9600
= F
OSC
CY
= F
Desired Baud Rate
CY
F
/2).
= F
CY
CY
OSC
F
/(16 (BRGx + 1))
CY
/Desired Baud Rate)/16) – 1
OSC
(1,2)
/2; Doze mode
/2; Doze mode and PLL are disabled.
– 1
The maximum baud rate (BRGH = 0) possible is
F
possible is F
Equation 17-2 shows the formula for computation of
the baud rate with BRGH = 1.
EQUATION 17-2:
The maximum baud rate (BRGH = 1) possible is F
(for UxBRG = 0) and the minimum baud rate possible
is F
Writing a new value to the UxBRG register causes the
BRG timer to be reset (cleared). This ensures the BRG
does not wait for a timer overflow before generating the
new baud rate.
CY
Note 1:
CY
/16 (for UxBRG = 0) and the minimum baud rate
/(4 * 65536).
2:
UxBRG =
CY
Baud Rate =
F
frequency.
Based on F
and PLL are disabled.
CY
/(16 * 65536).
(1)
denotes the instruction cycle clock
UART BAUD RATE WITH
BRGH = 1
2010 Microchip Technology Inc.
CY
4 • Baud Rate
4 • (UxBRG + 1)
= F
F
CY
OSC
F
CY
(1,2)
/2; Doze mode
– 1
CY
/4
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