PIC24FJ128GA308-I/PT Microchip Technology, PIC24FJ128GA308-I/PT Datasheet - Page 256
PIC24FJ128GA308-I/PT
Manufacturer Part Number
PIC24FJ128GA308-I/PT
Description
16-bit, 16 MIPS, 128 KB Flash, 8 KB RAM, 69 I/O, LCD, XLP W/Vbat 80 TQFP 12x12x1
Manufacturer
Microchip Technology
Datasheet
1.PIC24FJ128GA308-IPT.pdf
(406 pages)
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Part Number:
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PIC24FJ128GA310 FAMILY
REGISTER 20-2:
DS39996F-page 256
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12
bit 11-8
bit 7-0
Note 1:
RADDR23
R-0, HSC
R/W-0
BUSY
If RADDR<23:16> = 00000000, then the last EDS address for Chip Select 2 will be FFFFFFh.
(1)
BUSY: Busy bit (Master mode only)
1 = Port is busy
0 = Port is not busy
Unimplemented: Read as ‘0’
ERROR: Error bit
1 = Transaction error (illegal transaction was requested)
0 = Transaction completed successfully
TIMEOUT: Time-out bit
1 = Transaction timed out
0 = Transaction completed successfully
Unimplemented: Read as ‘0’
RADDR<23:16>: Parallel Master Port Reserved Address Space bits
RADDR22
R/W-0
U-0
—
PMCON2: EPMP CONTROL REGISTER 2
(1)
HS = Hardware Settable bit
W = Writable bit
‘1’ = Bit is set
RADDR21
R/C-0, HS
ERROR
R/W-0
(1)
RADDR20
R/C-0, HS
TIMEOUT
R/W-0
(1)
HSC = Hardware Settable/Clearable bit
U = Unimplemented, read as ‘0’
‘0’ = Bit is cleared
RADDR19
R/W-0
U-0
—
(1)
RADDR18
R/W-0
U-0
—
2010-2011 Microchip Technology Inc.
(1)
(1)
x = Bit is unknown
RADDR17
R/W-0
U-0
—
(1)
RADDR16
R/W-0
U-0
—
bit 8
bit 0
(1)
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