PIC24FJ256DA110T-I/PT Microchip Technology, PIC24FJ256DA110T-I/PT Datasheet - Page 207

• Manufacturer Part Number: PIC24FJ256DA110T-I/PT
• Description: 16-bit, 256KB Flash, 24K RAM, USB, Graphics 100 TQFP 12x12x1mm T/R
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ256DA110T-I/PT

• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, GFX, LVD, POR, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 256KB (85.5K x 24)
• Program Memory Type: FLASH
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

REGISTER 14-1:
 2010 Microchip Technology Inc.
bit 3
bit 2-0
Note 1:
2:
3:
4:
The OCx output must also be configured to an available RPn pin. For more information, see Section 10.4
“Peripheral Pin Select (PPS)”.
The Fault input enable and Fault status bits are valid when OCM<2:0> = 111 or 110.
The Comparator 1 output controls the OC1-OC3 channels; Comparator 2 output controls the OC4-OC6
channels; Comparator 3 output controls the OC7-OC9 channels.
The OCFA/OCFB Fault input must also be configured to an available RPn/RPIn pin. For more information,
see Section 10.4 “Peripheral Pin Select (PPS)”.
TRIGMODE: Trigger Status Mode Select bit
1 = TRIGSTAT (OCxCON2<6>) is cleared when OCxRS = OCxTMR or in software
0 = TRIGSTAT is only cleared by software
OCM<2:0>: Output Compare x Mode Select bits
111 = Center-Aligned PWM mode on OCx
110 = Edge-Aligned PWM Mode on OCx
101 = Double Compare Continuous Pulse mode: Initialize the OCx pin low, the toggle OCx state
100 = Double Compare Single-Shot mode: Initialize the OCx pin low, toggle the OCx state on matches
011 = Single Compare Continuous Pulse mode: Compare events continuously toggle the OCx pin
010 = Single Compare Single-Shot mode: Initialize OCx pin high, compare event forces the OCx pin low
001 = Single Compare Single-Shot mode: Initialize OCx pin low, compare event forces the OCx pin high
000 = Output compare channel is disabled
OCxCON1: OUTPUT COMPARE x CONTROL REGISTER 1 (CONTINUED)
continuously on alternate matches of OCxR and OCxRS
of OCxR and OCxRS for one cycle
PIC24FJ256DA210 FAMILY
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DS39969B-page 207