PIC24FJ256DA206T-I/MR Microchip Technology, PIC24FJ256DA206T-I/MR Datasheet - Page 4

16-bit, 256KB Flash, 96K RAM, USB, Graphics 64 QFN 9x9x0.9mm T/R

PIC24FJ256DA206T-I/MR

Manufacturer Part Number
PIC24FJ256DA206T-I/MR
Description
16-bit, 256KB Flash, 96K RAM, USB, Graphics 64 QFN 9x9x0.9mm T/R
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheets

Specifications of PIC24FJ256DA206T-I/MR

Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, GFX, LVD, POR, PWM, WDT
Number Of I /o
52
Program Memory Size
256KB (85.5K x 24)
Program Memory Type
FLASH
Ram Size
96K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC24FJ256DA210 FAMILY
6. Module: Output Compare (Cascaded
DS80505C-page 4
When 32-bit Cascaded mode is enabled
(OCxCON2<8>
unavailable:
• Single-Shot operations when OCM
• Synchronous modes when the SYNCSEL bits
Work around
None.
Affected Silicon Revisions
A3
(OCxCON1<2:0> = 110 or 111 and OCTRIG
(OCxCON2<7>) = 1 and TRIGMODE
(OCxCON1<3>) = 1.
(OCxCON2<4:0>) ! = 00000 and OCTRIG
(OCxCON2<7>) = 0.
X
Mode)
=
1),
these
modes
are
7. Module: USB
While operating in Host mode and attached to a
low-speed device through a full-speed USB hub,
the host may persistently drive the bus to an
SE0 state (both D+/D- as 0) which would be
interpreted as a bus Reset condition by the hub;
or the host may persistently drive the bus to a J
state, which would make the hub detach
condition undetectable by the host.
Work around
Connect low-speed devices directly to the host
USB port and not through a USB hub.
Affected Silicon Revisions
A3
X
 2011 Microchip Technology Inc.

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