PIC24FJ64GA102-E/SS Microchip Technology, PIC24FJ64GA102-E/SS Datasheet - Page 181

16-bit, 16 MIPS, 64KB Flash, 8KB RAM, Nanowatt XLP 28 SSOP .209in TUBE

PIC24FJ64GA102-E/SS

Manufacturer Part Number
PIC24FJ64GA102-E/SS
Description
16-bit, 16 MIPS, 64KB Flash, 8KB RAM, Nanowatt XLP 28 SSOP .209in TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr
Datasheet

Specifications of PIC24FJ64GA102-E/SS

Processor Series
PIC24
Core
PIC24F
Data Bus Width
16 bit
Program Memory Type
Flash
Program Memory Size
64 KB
Data Ram Size
8192 B
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
21
Number Of Timers
5
Operating Supply Voltage
2 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
SSOP-28
Development Tools By Supplier
MPLAB Integrated Development Environment
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 125 C
Supply Current (max)
300 mA
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
21
Eeprom Size
-
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Lead Free Status / Rohs Status
 Details
REGISTER 16-2:
 2010 Microchip Technology Inc.
bit 4
bit 3
bit 2
bit 1
bit 0
P: Stop bit
1 = Indicates that a Stop bit has been detected last
0 = Stop bit was not detected last
Hardware set or clear when Start, Repeated Start or Stop is detected.
S: Start bit
1 = Indicates that a Start (or Repeated Start) bit has been detected last
0 = Start bit was not detected last
Hardware set or clear when Start, Repeated Start or Stop is detected.
R/W: Read/Write Information bit (when operating as I
1 = Read – indicates data transfer is output from the slave
0 = Write – indicates data transfer is input to the slave
Hardware set or clear after reception of I
RBF: Receive Buffer Full Status bit
1 = Receive is complete, I2CxRCV is full
0 = Receive is not complete, I2CxRCV is empty
Hardware set when I2CxRCV is written with received byte. Hardware clear when software reads I2CxRCV.
TBF: Transmit Buffer Full Status bit
1 = Transmit is in progress, I2CxTRN is full
0 = Transmit is complete, I2CxTRN is empty
Hardware set when software writes I2CxTRN. Hardware clear at completion of data transmission.
I2CxSTAT: I2Cx STATUS REGISTER (CONTINUED)
PIC24FJ64GA104 FAMILY
2
C device address byte.
2
C slave)
DS39951C-page 181

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