PIC24FJ64GA106-I/PT Microchip Technology, PIC24FJ64GA106-I/PT Datasheet - Page 47
![16-bit, 16 MIPS, 64KB Flash, 16Kb RAM, 84 I/O, NanoWatt 64 TQFP 10x10x1mm TRAY](/photos/16/13/161322/tqfp64_sml.jpg)
PIC24FJ64GA106-I/PT
Manufacturer Part Number
PIC24FJ64GA106-I/PT
Description
16-bit, 16 MIPS, 64KB Flash, 16Kb RAM, 84 I/O, NanoWatt 64 TQFP 10x10x1mm TRAY
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheet
1.PIC24FJ128GA106-IPT.pdf
(330 pages)
Specifications of PIC24FJ64GA106-I/PT
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
64KB (22K x 24)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP
Processor Series
PIC24FJ256GA110
Core
PIC
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
UART, I2C, SPI
Maximum Clock Frequency
8 MHz
Number Of Timers
5
Operating Supply Voltage
3.6 V
Maximum Operating Temperature
- 40 C to + 85 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24FJ64GA106-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
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TABLE 4-12:
TABLE 4-13:
TABLE 4-14:
TABLE 4-15:
TRISA
PORTA
LATA
ODCA
Legend:
Note
TRISB
PORTB
LATB
ODCB
Legend:
TRISC
PORTC
LATC
ODCC
Legend:
Note
TRISD
PORTD
LATD
ODCD
Legend:
Note 1:
Name
Name
Name
Name
File
File
File
File
1:
2:
1:
2:
3:
4:
Addr
02C0
02C2
02C4
02C6
02DC
02CA
02CC
02CE
Addr
02D8
02DA
02DE
Addr
02C8
Addr
02D0
02D2
02D4
02D6
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal. Reset values shown are for 100-pin devices.
PORTA and all associated bits are unimplemented on 64-pin devices and read as ‘0’. Bits are available on 80-pin and 100-pin devices only, unless otherwise noted.
Bits are implemented on 100-pin devices only; otherwise, read as ‘0’.
Reset values are shown in hexadecimal.
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal. Reset values shown are for 100-pin devices.
Bits are unimplemented in 64-pin and 80-pin devices; read as ‘0’.
Bits are unimplemented in 64-pin devices; read as ‘0’.
RC12 and RC15 are only available when the Primary Oscillator is disabled or when EC mode is selected (POSCMD<1:0> Configuration bits = 11 or 00); otherwise, read as ‘0’
RC15 is only available when POSCMD<1:0> Configuration bits = 11 or 00 and the OSCIOFN Configuration bit = 1.
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal. Reset values shown are for 100-pin devices.
Bits are unimplemented on 64-pin devices; read as ‘0’.
TRISA15 TRISA14
RC15
LATA15
ODA15
TRISC15 TRISC14 TRISC13 TRISC12
TRISD15 TRISD14 TRISD13 TRISD12 TRISD11 TRISD10
TRISB15 TRISB14 TRISB13 TRISB12 TRISB11 TRISB10
LATC15
Bit 15
LATD15
PORTA REGISTER MAP
Bit 15
PORTB REGISTER MAP
LATB15
PORTC REGISTER MAP
ODC15
PORTD REGISTER MAP
ODD15
RA15
ODB15
Bit 15
Bit 15
RD15
RB15
(3,4)
(1)
LATA14
ODA14
LATB14
LATC14
Bit 14
LATD14
Bit 14
ODC14
ODD14
RA14
ODB14
Bit 14
Bit 14
RC14
RD14
RB14
(1)
Bit 13
LATD13
LATB13
LATC13
Bit 13
ODB13
ODC13
ODD13
Bit 13
Bit 13
RC13
RD13
RB13
—
—
—
—
(1)
RC12
LATC12
Bit 12
LATD12
Bit 12
LATB12
ODC12
ODD12
ODB12
Bit 12
Bit 12
RB12
RD12
—
—
—
—
(1)
(3)
(1)
LATD11
LATB11
ODD11
Bit 11
ODB11
Bit 11
Bit 11
Bit 11
RB11
RD11
—
—
—
—
—
—
—
—
TRISA10
LATA10
ODA10
LATB10
LATD10
Bit 10
ODB10
ODD10
RA10
Bit 10
Bit 10
Bit 10
RD10
RB10
—
—
—
—
TRISA9
TRISD9
LATA9
TRISB9
ODA9
LATB9
LATD9
ODD9
Bit 9
ODB9
RA9
Bit 9
Bit 9
Bit 9
RD9
RB9
—
—
—
—
TRISD8
TRISB8
LATD8
LATB8
Bit 8
ODB8
ODD8
Bit 8
Bit 8
Bit 8
RD8
RB8
—
—
—
—
—
—
—
—
TRISA7
Bit 7
TRISB7
TRISD7
LATA7
ODA7
LATD7
LATB7
ODD7
ODB7
RA7
Bit 7
Bit 7
Bit 7
RB7
RD7
—
—
—
—
(2)
TRISA6
Bit 6
TRISB6
TRISD6
LATA6
ODA6
LATB6
LATD6
ODD6
ODB6
RA6
Bit 6
Bit 6
Bit 6
RD6
RB6
—
—
—
—
(2)
TRISA5
TRISD5
Bit 5
TRISB5
LATA5
ODA5
LATB5
LATD5
ODB5
ODD5
RA5
Bit 5
Bit 5
Bit 5
RD5
RB5
—
—
—
—
(2)
TRISA4
TRISC4
TRISD4
Bit 4
TRISB4
LATA4
Bit 4
LATC4
LATD4
ODA4
LATB4
ODC4
ODD4
ODB4
RA4
Bit 4
Bit 4
RB4
RC4
RD4
(2)
(1)
TRISA3
TRISC3
Bit 3
TRISB3
TRISD3
Bit 3
LATA3
ODA3
LATC3
LATD3
LATB3
ODC3
ODD3
ODB3
RA3
Bit 3
RC3
Bit 3
RB3
RD3
(2)
(2)
TRISA2
TRISC2
TRISD2
TRISB2
LATA2
Bit 2
LATC2
Bit2
ODA2
LATB2
LATD2
ODB2
ODC2
ODD2
RA2
Bit 2
RC2
Bit 2
RD2
RB2
(2)
(1)
TRISA1
TRISC1
TRISD1
Bit 1
TRISB1
LATA1
Bit 1
LATC1
LATD1
ODA1
LATB1
ODC1
ODD1
ODB1
Bit 1
RA1
Bit 1
RC1
RD1
RB1
(2)
(2)
TRISA0
TRISB0
TRISD0
Bit 0
LATA0
LATD0
ODA0
LATB0
ODD0
ODB0
Bit 0
Bit 0
Bit 0
RA0
RB0
RD0
—
—
—
—
(2)
Resets
Resets
Resets
Resets
F01E
xxxx
xxxx
0000
36FF
xxxx
xxxx
0000
FFFF
xxxx
xxxx
0000
FFFF
xxxx
xxxx
0000
All
All
All
All
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