PIC24FJ64GA106T-I/PT Microchip Technology, PIC24FJ64GA106T-I/PT Datasheet - Page 231
PIC24FJ64GA106T-I/PT
Manufacturer Part Number
PIC24FJ64GA106T-I/PT
Description
16-bit, 16 MIPS, 64KB Flash, 16Kb RAM, 84 I/O, NanoWatt 64 TQFP 10x10x1mm T/R
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheet
1.PIC24FJ128GA106-IPT.pdf
(330 pages)
Specifications of PIC24FJ64GA106T-I/PT
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
64KB (22K x 24)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Processor Series
PIC24FJ256GA110
Core
PIC
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
UART, I2C, SPI
Maximum Clock Frequency
8 MHz
Number Of Timers
5
Operating Supply Voltage
3.6 V
Maximum Operating Temperature
- 40 C to + 85 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24FJ64GA106T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
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REGISTER 21-5:
REGISTER 21-6:
2010 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-2
bit 1
bit 0
PCFG15
PCFG7
R/W-0
R/W-0
U-0
U-0
—
—
PCFG<15:0>: Analog Input Pin Configuration Control bits
1 = Pin for corresponding analog channel is configured in Digital mode; I/O port read enabled
0 = Pin configured in Analog mode; I/O port read disabled, A/D samples pin voltage
Unimplemented: Read as ‘0’
PCFG17: A/D Input Band Gap Scan Enable bit
1 = Analog channel disabled from input scan
0 = Internal band gap (V
PCFG16: A/D Input Half Band Gap Scan Enable bit
1 = Analog channel disabled from input scan
0 = Internal V
PCFG14
PCFG6
R/W-0
R/W-0
U-0
U-0
—
—
AD1PCFGL: A/D PORT CONFIGURATION REGISTER (LOW)
AD1PCFGH: A/D PORT CONFIGURATION REGISTER (HIGH)
BG
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
/2 channel enabled for input scan
PCFG13
PCFG5
R/W-0
R/W-0
U-0
U-0
—
—
BG
) channel enabled for input scan
PCFG12
PIC24FJ256GA110 FAMILY
PCFG4
R/W-0
R/W-0
U-0
U-0
—
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PCFG11
PCFG3
R/W-0
R/W-0
U-0
U-0
—
—
PCFG10
PCFG2
R/W-0
R/W-0
U-0
U-0
—
—
x = Bit is unknown
x = Bit is unknown
PCFG17
PCFG9
PCFG1
R/W-0
R/W-0
R/W-0
U-0
—
DS39905E-page 231
PCFG16
PCFG0
PCFG8
R/W-0
R/W-0
R/W-0
U-0
—
bit 8
bit 0
bit 8
bit 0
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