PIC24HJ16GP304T-I/ML Microchip Technology, PIC24HJ16GP304T-I/ML Datasheet - Page 56
![16-bit MCU, 16KB Flash,40 MIPS,nanoWatt 44 QFN 8x8x0.9mm T/R](/photos/6/81/68122/150-44-qfn_sml.jpg)
PIC24HJ16GP304T-I/ML
Manufacturer Part Number
PIC24HJ16GP304T-I/ML
Description
16-bit MCU, 16KB Flash,40 MIPS,nanoWatt 44 QFN 8x8x0.9mm T/R
Manufacturer
Microchip Technology
Series
PIC® 24Hr
Datasheets
1.PIC24HJ12GP201-ISO.pdf
(84 pages)
2.PIC24HJ32GP202-ISO.pdf
(272 pages)
3.PIC24HJ32GP202-ISO.pdf
(8 pages)
4.PIC24HJ32GP202-ISO.pdf
(12 pages)
Specifications of PIC24HJ16GP304T-I/ML
Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
16KB (5.5K x 24)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 13x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PIC24HJ16GP304T-I/MLTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24HJ16GP304T-I/ML
Manufacturer:
MICROCHIP
Quantity:
12 000
- PIC24HJ12GP201-ISO PDF datasheet
- PIC24HJ32GP202-ISO PDF datasheet #2
- PIC24HJ32GP202-ISO PDF datasheet #3
- PIC24HJ32GP202-ISO PDF datasheet #4
- Current page: 56 of 272
- Download datasheet (4Mb)
PIC24HJ32GP202/204 AND PIC24HJ16GP304
6.1
The PIC24HJ32GP202/204 and PIC24HJ16GP304
family of devices have two types of Reset:
• Cold Reset
• Warm Reset
A cold Reset is the result of a Power-on Reset (POR)
or a Brown-out Reset (BOR). On a cold Reset, the
FNOSC configuration bits in the FOSC device
configuration register selects the device clock source.
TABLE 6-1:
DS70289G-page 56
FRC, FRCDIV16,
FRCDIVN
FRCPLL
XT
HS
EC
XTPLL
HSPLL
ECPLL
SOSC
LPRC
Note 1:
Oscillator Mode
2:
3:
System Reset
T
times vary with crystal characteristics, load capacitance, etc.
T
10 MHz crystal and T
T
OSCD
OST
LOCK
= Oscillator Start-up Timer Delay (1024 oscillator clock period). For example, T
OSCILLATOR DELAY
= PLL lock time (1.5 ms nominal), if PLL is enabled.
= Oscillator Start-up Delay (1.1 μs max for FRC, 70 μs max for LPRC). Crystal Oscillator start-up
Start-up Delay
Oscillator
T
T
T
T
T
T
T
T
OSCD
OSCD
OSCD
OSCD
OSCD
OSCD
OSCD
OSCD
—
—
OST
= 32 ms for a 32 kHz crystal.
Oscillator Start-up
Timer
T
T
T
T
T
OST
OST
OST
OST
OST
—
—
—
—
—
A warm Reset is the result of all other reset sources,
including the RESET instruction. On warm Reset, the
device will continue to operate from the current clock
source as indicated by the Current Oscillator Selection
bits (COSC<2:0>) in the Oscillator Control register
(OSCCON<14:12>).
The device is kept in a Reset state until the system
power supplies have stabilized at appropriate levels
and the oscillator clock is ready. The sequence in
which this occurs is detailed below and is shown in
Figure
6-2.
PLL Lock Time
T
T
T
T
LOCK
LOCK
LOCK
LOCK
—
—
—
—
—
—
© 2011 Microchip Technology Inc.
T
T
OSCD
OSCD
OST
T
T
T
T
OSCD
Total Delay
= 102.4 μs for a
OSCD
OSCD
OSCD
+ T
+ T
T
T
T
OSCD
OSCD
LOCK
OST
OST
—
+ T
+ T
+ T
+ T
LOCK
OST
OST
+ T
+ T
OST
LOCK
LOCK
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