PIC24HJ32GP204T-I/ML Microchip Technology, PIC24HJ32GP204T-I/ML Datasheet - Page 125
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PIC24HJ32GP204T-I/ML
Manufacturer Part Number
PIC24HJ32GP204T-I/ML
Description
16-bit MCU, 32KB Flash,40 MIPS,nanoWatt 44 QFN 8x8x0.9mm T/R
Manufacturer
Microchip Technology
Series
PIC® 24Hr
Datasheets
1.PIC24HJ12GP201-ISO.pdf
(84 pages)
2.PIC24HJ32GP202-ISO.pdf
(272 pages)
3.PIC24HJ32GP202-ISO.pdf
(8 pages)
4.PIC24HJ32GP202-ISO.pdf
(12 pages)
Specifications of PIC24HJ32GP204T-I/ML
Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
32KB (11K x 24)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 13x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PIC24HJ32GP204T-I/MLTR
- PIC24HJ12GP201-ISO PDF datasheet
- PIC24HJ32GP202-ISO PDF datasheet #2
- PIC24HJ32GP202-ISO PDF datasheet #3
- PIC24HJ32GP202-ISO PDF datasheet #4
- Current page: 125 of 272
- Download datasheet (4Mb)
12.0
The Timer2/3 feature has 32-bit timers that can also be
configured as two independent 16-bit timers with
selectable operating modes.
As a 32-bit timer, the Timer2/3 feature permits
operation in three modes:
• Two Independent 16-bit timers (Timer2 and
• Single 32-bit timer (Timer2/3)
• Single 32-bit synchronous counter (Timer2/3)
The Timer2/3 feature also supports:
• Timer gate operation
• Selectable Prescaler Settings
• Timer operation during Idle and Sleep modes
• Interrupt on a 32-bit Period Register Match
• Time Base for Input Capture and Output Compare
• ADC1 Event Trigger (Timer2/3 only)
Individually, all eight of the 16-bit timers can function as
synchronous timers or counters. They also offer the
features that are listed above, except for the event
trigger. The operating modes and enabled features are
determined by setting the appropriate bit(s) in the
T2CON and T3CON registers. T2CON registers are
shown in generic form in
registers are shown in
For 32-bit timer/counter operation, Timer2 is the least
significant word (lsw), and Timer3 is the most
significant word (msw) of the 32-bit timers.
© 2011 Microchip Technology Inc.
Timer3) with all 16-bit operating modes (except
Asynchronous Counter mode)
Modules (Timer2 and Timer3 only)
Note:
Note 1: This data sheet summarizes the features
2: Some registers and associated bits
TIMER2/3 FEATURE
PIC24HJ32GP202/204 AND PIC24HJ16GP304
For 32-bit operation, T3CON control bits
are ignored. Only T2CON control bit is
used for setup and control. Timer2 clock
and gate inputs are used for the 32-bit
timer modules, but an interrupt is
generated with the Timer3 interrupt flags.
of
PIC24HJ16GP304 family of devices. It is
not intended to be a comprehensive ref-
erence source. To complement the infor-
mation in this data sheet, refer to
“Section 11. Timers” (DS70206) of the
“dsPIC33F/PIC24H Family Reference
Manual”, which is available from the
Microchip website (www.microchip.com).
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization”
this data sheet for device-specific register
and bit information.
the
Register
PIC24HJ32GP202/204
Register
12-2.
12-1. T3CON
and
in
12.1
To configure the Timer2/3 feature for 32-bit operation:
1.
2.
3.
4.
5.
6.
The timer value at any point is stored in the register pair
TMR3:TMR2. TMR3 always contains the most
significant word of the count, while TMR2 contains the
least significant word.
To configure any of the timers for individual 16-bit
operation:
1.
2.
3.
4.
5.
6.
Set the corresponding T32 control bit.
Select the prescaler ratio for Timer2 using the
TCKPS<1:0> bits.
Set the Clock and Gating modes using the
corresponding TCS and TGATE bits.
Load the timer period value. PR3 contains the
most significant word of the value, while PR2
contains the least significant word.
Set the interrupt enable bit T3IE, if interrupts are
required. Use the priority bits T3IP<2:0> to set
the interrupt priority. While Timer2 controls the
timer, the interrupt appears as a Timer3
interrupt.
Set the corresponding TON bit.
Clear the T32 bit corresponding to that timer.
Select the timer prescaler ratio using the
TCKPS<1:0> bits.
Set the Clock and Gating modes using the TCS
and TGATE bits.
Load the timer period value into the PRx
register.
If interrupts are required, set the interrupt enable
bit, TxIE. Use the priority bits, TxIP<2:0>, to set
the interrupt priority.
Set the TON bit.
32-Bit Operation
DS70289G-page 125
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