PIC24HJ64GP504T-I/ML Microchip Technology, PIC24HJ64GP504T-I/ML Datasheet - Page 274

• Manufacturer Part Number: PIC24HJ64GP504T-I/ML
• Description: 16-bit MCU, 64KB Flash,CAN,DMA,40 MIPS,nanoWatt 44 QFN 8x8x0.9mm T/R
• Manufacturer: Microchip Technology
• Series: PIC® 24Hr

Specifications of PIC24HJ64GP504T-I/ML

• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 64KB (22K x 24)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 13x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PIC24HJ64GP504T-I/MLTR

PIC24HJ32GP302/304, PIC24HJ64GPX02/X04 AND PIC24HJ128GPX02/X04
TABLE 26-2:
DS70293E-page 274
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
Base
Instr
#
REPEAT
RESET
RETFIE
RETLW
RETURN
RLC
RLNC
RRC
RRNC
SE
SETM
SL
SUB
SUBB
SUBR
SUBBR
SWAP
TBLRDH
TBLRDL
TBLWTH
TBLWTL
Mnemonic
Assembly
INSTRUCTION SET OVERVIEW (CONTINUED)
REPEAT
REPEAT
RESET
RETFIE
RETLW
RETURN
RLC
RLC
RLC
RLNC
RLNC
RLNC
RRC
RRC
RRC
RRNC
RRNC
RRNC
SE
SETM
SETM
SETM
SL
SL
SL
SL
SL
SUB
SUB
SUB
SUB
SUB
SUBB
SUBB
SUBB
SUBB
SUBB
SUBR
SUBR
SUBR
SUBR
SUBBR
SUBBR
SUBBR
SUBBR
SWAP.b
SWAP
TBLRDH
TBLRDL
TBLWTH
TBLWTL
#lit14
Wn
#lit10,Wn
f
f,WREG
Ws,Wd
f
f,WREG
Ws,Wd
f
f,WREG
Ws,Wd
f
f,WREG
Ws,Wd
Ws,Wnd
f
WREG
Ws
f
f,WREG
Ws,Wd
Wb,Wns,Wnd
Wb,#lit5,Wnd
f
f,WREG
#lit10,Wn
Wb,Ws,Wd
Wb,#lit5,Wd
f
f,WREG
#lit10,Wn
Wb,Ws,Wd
Wb,#lit5,Wd
f
f,WREG
Wb,Ws,Wd
Wb,#lit5,Wd
f
f,WREG
Wb,Ws,Wd
Wb,#lit5,Wd
Wn
Wn
Ws,Wd
Ws,Wd
Ws,Wd
Ws,Wd
Assembly Syntax
Repeat Next Instruction lit14 + 1 times
Repeat Next Instruction (Wn) + 1 times
Software device Reset
Return from interrupt
Return with literal in Wn
Return from Subroutine
f = Rotate Left through Carry f
WREG = Rotate Left through Carry f
Wd = Rotate Left through Carry Ws
f = Rotate Left (No Carry) f
WREG = Rotate Left (No Carry) f
Wd = Rotate Left (No Carry) Ws
f = Rotate Right through Carry f
WREG = Rotate Right through Carry f
Wd = Rotate Right through Carry Ws
f = Rotate Right (No Carry) f
WREG = Rotate Right (No Carry) f
Wd = Rotate Right (No Carry) Ws
Wnd = sign-extended Ws
f = 0xFFFF
WREG = 0xFFFF
Ws = 0xFFFF
f = Left Shift f
WREG = Left Shift f
Wd = Left Shift Ws
Wnd = Left Shift Wb by Wns
Wnd = Left Shift Wb by lit5
f = f – WREG
WREG = f – WREG
Wn = Wn – lit10
Wd = Wb – Ws
Wd = Wb – lit5
f = f – WREG – (C)
WREG = f – WREG – (C)
Wn = Wn – lit10 – (C)
Wd = Wb – Ws – (C)
Wd = Wb – lit5 – (C)
f = WREG – f
WREG = WREG – f
Wd = Ws – Wb
Wd = lit5 – Wb
f = WREG – f – (C)
WREG = WREG – f – (C)
Wd = Ws – Wb – (C)
Wd = lit5 – Wb – (C)
Wn = nibble swap Wn
Wn = byte swap Wn
Read Prog<23:16> to Wd<7:0>
Read Prog<15:0> to Wd
Write Ws<7:0> to Prog<23:16>
Write Ws to Prog<15:0>
Description
© 2011 Microchip Technology Inc.
Words
# of
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Cycles
3 (2)
3 (2)
3 (2)
# of
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
Status Flags
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,N,OV,Z
C,N,OV,Z
C,N,OV,Z
Affected
C,N,Z
C,N,Z
C,N,Z
C,N,Z
C,N,Z
C,N,Z
C,N,Z
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
N,Z
N,Z
N,Z
N,Z
N,Z
N,Z
N,Z
N,Z