PIC32MX564F064H-I/MR Microchip Technology, PIC32MX564F064H-I/MR Datasheet - Page 250

• Manufacturer Part Number: PIC32MX564F064H-I/MR
• Description: 64 PINS, 64KB Flash, 32KB RAM, 80 MHz, USB, CAN, 4 DMA 64 QFN 9x9x0.9mm TUBE
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX564F064H-I/MR

• Core Processor: MIPS32® M4K™
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: CAN, I²C, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN Exposed Pad
• Processor Series: PIC32MX5x
• Core: MIPS32
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 5
• Operating Supply Voltage: 2.3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC32MX5XX/6XX/7XX
P
Packaging ......................................................................... 225
Parallel Master Port (PMP) ............................................... 145
PIC32 Family USB Interface Diagram............................... 128
Pinout I/O Descriptions (table) ............................................ 32
Power-on Reset (POR)
Power-Saving Features..................................................... 159
Prefetch Cache ................................................................. 123
Program Flash Memory
R
Reader Response ............................................................. 252
Real-Time Clock and Calendar (RTCC)............................ 147
Register Maps ............................................................. 58–112
Registers
Resets ............................................................................... 115
Revision History ................................................................ 240
S
Serial Peripheral Interface (SPI) ....................................... 139
Software Simulator (MPLAB SIM)..................................... 179
Special Features ............................................................... 161
T
Timer1 Module .................................................................. 131
Timer2/3, Timer4/5 Modules ............................................. 133
Timing Diagrams
DS61156F-page 250
Details ....................................................................... 227
Marking ..................................................................... 225
and On-Chip Voltage Regulator ................................ 171
CPU Halted Methods ................................................ 159
Operation .................................................................. 159
with CPU Running..................................................... 159
Wait State Characteristics......................................... 189
DDPCON (Debug Data Port Control)........................ 173
DEVCFG0 (Device Configuration Word 0 ................. 162
DEVCFG1 (Device Configuration Word 1 ................. 164
DEVCFG2 (Device Configuration Word 2 ................. 166
DEVCFG3 (Device Configuration Word 3 ................. 168
DEVID (Device and Revision ID) .............................. 169
10-Bit A/D Conversion (ASAM = 0, SSRC<2:0> = 000) .
10-Bit A/D Conversion (CHPS<1:0> = 01, ASAM = 1,
CAN I/O..................................................................... 211
EJTAG ...................................................................... 223
External Clock ........................................................... 191
I/O Characteristics .................................................... 194
I2Cx Bus Data (Master Mode) .................................. 205
I2Cx Bus Data (Slave Mode) .................................... 208
I2Cx Bus Start/Stop Bits (Master Mode) ................... 205
I2Cx Bus Start/Stop Bits (Slave Mode) ..................... 208
Input Capture (CAPx)................................................ 198
OCx/PWM ................................................................. 199
Output Compare (OCx) ............................................. 199
Parallel Master Port Read ......................................... 220
Parallel Master Port Write ......................................... 221
Parallel Slave Port .................................................... 219
SPIx Master Mode (CKE = 0).................................... 200
SPIx Master Mode (CKE = 1).................................... 201
SPIx Slave Mode (CKE = 0)...................................... 202
SPIx Slave Mode (CKE = 1)...................................... 203
Timer1, 2, 3, 4, 5 External Clock............................... 197
UART Reception ....................................................... 144
UART Transmission (8-Bit or 9-Bit Data) .................. 144
217
SSRC<2:0> = 111, SAMC<4:0> = 00001)........ 218
Timing Requirements
Timing Specifications
U
UART ................................................................................ 143
USB On-The-Go (OTG) .................................................... 127
V
V
Voltage Reference Specifications..................................... 190
Voltage Regulator (On-Chip) ............................................ 171
W
Watchdog Timer (WDT).................................................... 170
WWW Address ................................................................. 251
WWW, On-Line Support ..................................................... 29
CAP
CLKO and I/O ........................................................... 194
CAN I/O Requirements ............................................. 211
I2Cx Bus Data Requirements (Master Mode)........... 206
I2Cx Bus Data Requirements (Slave Mode)............. 209
Input Capture Requirements..................................... 198
Output Compare Requirements................................ 199
Simple OCx/PWM Mode Requirements ................... 199
SPIx Master Mode (CKE = 0) Requirements............ 200
SPIx Master Mode (CKE = 1) Requirements............ 201
SPIx Slave Mode (CKE = 1) Requirements.............. 203
SPIx Slave Mode Requirements (CKE = 0).............. 202
/V
CORE
pin ................................................................ 171
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