PIC32MX795F512HT-80I/PT Microchip Technology, PIC32MX795F512HT-80I/PT Datasheet - Page 96

512KB Flash, 128KB RAM, 80 MHz, USB, ENET, 2xCAN, 8 DMA 64 TQFP 10x10x1mm T/R

PIC32MX795F512HT-80I/PT

Manufacturer Part Number
PIC32MX795F512HT-80I/PT
Description
512KB Flash, 128KB RAM, 80 MHz, USB, ENET, 2xCAN, 8 DMA 64 TQFP 10x10x1mm T/R
Manufacturer
Microchip Technology
Series
PIC® 32MXr

Specifications of PIC32MX795F512HT-80I/PT

Core Processor
MIPS32® M4K™
Core Size
32-Bit
Speed
80MHz
Connectivity
CAN, Ethernet, I²C, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Processor Series
PIC32MX7xx
Core
MIPS
3rd Party Development Tools
52713-733, 52714-737
Development Tools By Supplier
PG164130, DV164035, DV244005
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC32MX795F512HT-80I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Company:
Part Number:
PIC32MX795F512HT-80I/PT
Quantity:
1 200
TABLE 4-32:
TABLE 4-33:
Legend:
Note
Legend:
Note
6140
6150 PORTF
6160
6170
6140
6150
6160
6170
1:
1:
PORTF
TRISF
ODCF
TRISF
ODCF
LATF
LATF
x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
All registers in this table have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See
information.
x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
All registers in this table have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See
information.
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
PORTF REGISTER MAP FOR PIC32MX534F064H, PIC32MX564F064H, PIC32MX564F128H, PIC32MX575F256H,
PIC32MX575F512H, PIC32MX664F064H, PIC32MX664F128H, PIC32MX675F256H, PIC32MX675F512H, PIC32MX695F512H,
PIC32MX775F256H, PIC32MX775F512H AND PIC32MX795F512H DEVICES
PORTF REGISTER MAP PIC32MX534F064L, PIC32MX564F064L, PIC32MX564F128L, PIC32MX575F256L, PIC32MX575F512L,
PIC32MX664F064L, PIC32MX664F128L, PIC32MX675F256L, PIC32MX675F512L, PIC32MX695F512L, PIC32MX775F256L,
PIC32MX764F128L, PIC32MX775F512L AND PIC32MX795F512L DEVICES
31/15
31/15
30/14
30/14
TRISF13
ODCF13
LATF13
29/13
29/13
RF13
TRISF12
ODCF12
LATF12
28/12
28/12
RF12
27/11
27/11
26/10
26/10
25/9
25/9
TRISF8
ODCF8
LATF8
24/8
24/8
RF8
Bits
Bits
23/7
23/7
22/6
22/6
(1)
(1)
TRISF5
ODCF5
TRISF5
LATF5
ODCF5
LATF5
21/5
RF5
21/5
RF5
TRISF4
ODCF4
LATF4
TRISF4
ODCF4
LATF4
20/4
RF4
20/4
RF4
Section 12.1.1 “CLR, SET and INV Registers”
Section 12.1.1 “CLR, SET and INV Registers”
TRISF3
ODCF3
LATF3
TRISF3
ODCF3
LATF3
19/3
RF3
19/3
RF3
TRISF2
ODCF2
LATF2
18/2
18/2
RF2
TRISF1
ODCF1
LATF1
TRISF1
ODCF1
LATF1
17/1
RF1
17/1
RF1
TRISF0
ODCF0
TRISF0
LATF0
ODCF0
LATF0
16/0
RF0
16/0
RF0
for more
for more
0000
003B
0000
xxxx
0000
xxxx
0000
0000
0000
313F
0000
xxxx
0000
xxxx
0000
0000

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