SP706CU-L Exar Corporation, SP706CU-L Datasheet - Page 11

Low Power Microprocessor Supervisory Circuits

SP706CU-L

Manufacturer Part Number
SP706CU-L
Description
Low Power Microprocessor Supervisory Circuits
Manufacturer
Exar Corporation
Type
Simple Reset/Power-On Resetr
Datasheet

Specifications of SP706CU-L

Number Of Voltages Monitored
1
Reset
Active Low
Reset Timeout
140 ms Minimum
Voltage - Threshold
4.4V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
M
U
Monitor voltages other than the unregulated
DC by connecting a voltage divider to PFI and
adjusting the ratio appropriately. If required,
add hysteresis by connecting a resistor (with a
value approximately 10 times the sum of the
two resistors in the potential divider network)
between PFI and PFO. A capacitor between PFI
and GND will reduce the power-fail circuit's
sensitivity to high-frequency noise on the line
being monitored. RESET can be used to
monitor voltages other than the +5V V
Connect PFO to MR to initiate a RESET pulse
when PFI drops below 1.25V. Figure 21 shows
the SP705/706/707/708 configured to assert
RESET when the +5V supply falls below the
RESET threshold, or when the +12V supply
falls below approximately 11V.
M
The power-fail comparator can also monitor a
negative supply rail, shown in Figure 22. When
the negative rail is good (a negative voltage of
large magnitude), PFO is LOW. By adding the
resistors and transistor as shown, a HIGH PFO
triggers RESET. As long as PFO remains HIGH,
© 2010 Exar Corporation
NREGULATED
ONITORING
ONITORING A
Fig. 21: Monitoring +5V and +12V Power Supplies
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the SP705-708/813L will keep RESET asserted
(where RESET = LOW and RESET = HIGH).
Note that this circuit's accuracy depends on
the PFI threshold tolerance, the V
the resistors.
I
RESET P
µPs with bidirectional RESET pins, such as the
Motorola 68HC11 series, can contend with the
SP705/706/707/708 RESET output. If, for
example, the RESET output is driven HIGH and
the µP wants to pull it LOW, indeterminate
logic
connect a 4.7KΩ resistor between the RESET
output and the µP reset I/O, as shown if
Figure 23. Buffer the RESET output to other
system components.
NTERFACING TO µ
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Fig. 22: Monitoring a Negative Voltage Supply
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