SP706SEN-L/TR Exar Corporation, SP706SEN-L/TR Datasheet - Page 12

• Manufacturer Part Number: SP706SEN-L/TR
• Description: Low Power Microprocessor Supervisory Circuits
• Manufacturer: Exar Corporation
• Type: Simple Reset/Power-On Resetr

Specifications of SP706SEN-L/TR

• Number Of Voltages Monitored: 1
• Reset: Active Low
• Reset Timeout: 140 ms Minimum
• Voltage - Threshold: 2.93V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• Monitored Voltage: 2.93 V
• Undervoltage Threshold: 0.6 V
• Overvoltage Threshold: 3.85 V
• Output Type: Active Low
• Manual Reset: Resettable
• Watchdog: Watchdog
• Battery Backup Switching: No Backup
• Power-up Reset Delay (typ): 200 ms
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 1 V
• Supply Current (typ): 25 uA
• Maximum Power Dissipation: 727 mW
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Power Fail Detection: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

resistors and transistor as shown, a HIGH PFO
triggers RESET. As long as PFO remains HIGH,
the SP706R/S/T-SP708R/S/T series will keep
RESET asserted (where RESET = LOW and
RESET = HIGH). Note that this circuit's
accuracy
tolerance, the V
© 2010 Exar Corporation
Fig. 21: Monitoring +3.3V/+3.0V and +12V Power
Fig. 22: Monitoring a Negative Voltage Supply
depends
CC
line, and the resistors.
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µPs with bidirectional RESET pins, such as the
Motorola 68HC11 series, can contend with the
SP705/706/707/708 RESET output. If, for
example, the RESET output is driven HIGH and
the µP wants to pull it LOW, indeterminate
logic
connect a 4.7KΩ resistor between the RESET
output and the µP reset I/O, as shown if
Figure 23. Buffer the RESET output to other
system components.
N
While issuing resets to the μP during power-
up, power-down, and brownout conditions,
these supervisors are relatively immune to
short duration negative-going VCC transients
(glitches). It is usually undesirable to reset the
μP when V
Figure 24 shows maximum transient duration
vs. reset-comparator overdrive, for which
reset pulses are not generated. The data was
generated using negative-going V
starting at 3.3V and ending below the reset
threshold by the magnitude indicated (reset
comparator overdrive). The graph shows the
maximum pulse width a negative-going V
transient may typically have without causing a
reset pulse to be issued. As the amplitude of
the transient increases (i.e. goes farther below
P
P
NTERFACING TO µ
EGATIVE
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Fig. 23: Interfacing to Microprocessors
7
7
with Bidirectional RESET I/O (SP706)
INS
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experiences only small glitches.
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