SX1508EVK Semtech, SX1508EVK Datasheet - Page 15

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SX1508EVK

Manufacturer Part Number
SX1508EVK
Description
Evaluation Board For SX1508
Manufacturer
Semtech
Datasheets
SX1507/SX1508/SX1509
World’s Lowest Voltage Level Shifting GPIO
with LED Driver and Keypad Engine
ADVANCED COMMUNICATIONS & SENSING
Figure 8 - 2-Wire Serial Interface, Write Operation
When successive register data (WD1...WDn) is supplied by the master, the register address can be
automatically incremented or kept fixed depending on the setting programmed in RegMisc.
1
Figure 9 – Example: Write RegData Register
4.5.2
READ
After the start condition [S], the slave address (SA) is sent, followed by an eighth bit (‘0’) indicating a Write. The
slave then Acknowledges [A] that it is being addressed, and the Master responds with an 8 bit Data consisting of
the Register Address (RA). The slave Acknowledges [A] and the master sends the Repeated Start Condition
[Sr]. Once again, the slave address (SA) is sent, followed by an eighth bit (‘1’) indicating a Read.
The slave responds with an Acknowledge [A] and the read Data byte (RD0). If the master needs to read more
data it will acknowledge [A] and the slave will send the next read byte (RD1). This sequence can be repeated
until the master terminates with a NACK [N] followed by a stop [P].
Figure 10 - 2-Wire Serial Interface, Read Operation
When successive register data (RD1...RDn) is read by the master, the register address will be automatically
incremented or kept fixed depending on the setting programmed in RegMisc.
4.6
I/O Banks
4.6.1
Input Debouncer
Each input can be individually debounced by setting corresponding bits in RegDebounce register. At power up
the debounce function is disabled. After enabling the debouncer, the change of the input value is accepted only if
the input value is identical at two consecutive sampling times.
th
Rev 1 – 30
Oct. 2009
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