XR16L2450IJ-F Exar Corporation, XR16L2450IJ-F Datasheet - Page 3

• Manufacturer Part Number: XR16L2450IJ-F
• Description: 2.25 To 5.5V W/ 5V TOLERANT DUART
• Manufacturer: Exar Corporation

Specifications of XR16L2450IJ-F

• Features: *
• Number Of Channels: 2, DUART
• Fifo's: 1 Byte
• Protocol: RS232
• Voltage - Supply: 2.25 V ~ 5.5 V
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• With Cmos: Yes
• Mounting Type: Surface Mount
• Package / Case: 44-LCC (J-Lead)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

xr
REV. 1.1.1
PACKAGE PIN DESCRIPTIONS
PIN DESCRIPTIONS
DATA BUS INTERFACE
MODEM OR SERIAL I/O INTERFACE
RTSA#
N
IOW#
CSA#
CSB#
IOR#
INTB
INTA
RXA
TXA
D7
D6
D5
D4
D3
D2
D1
D0
A2
A1
A0
AME
44-PLCC
P
29
30
31
24
20
16
17
33
32
13
11
36
IN
9
8
7
6
5
4
3
2
#
48-TQFP
P
26
27
28
48
47
46
45
44
19
15
10
30
29
33
IN
11
3
2
1
7
5
#
T
YPE
IO
O
O
O
O
I
I
I
I
I
I
Address data lines [2:0]. These 3 address lines select one of the inter-
nal registers in UART channel A/B during a data bus transaction.
Data bus lines [7:0] (bidirectional).
Input/Output Read Strobe (active low). The falling edge instigates an
internal read cycle and retrieves the data byte from an internal register
pointed to by the address lines [A2:A0]. The data byte is placed on the
data bus to allow the host processor to read it on the rising edge.
Input/Output Write Strobe (active low). The falling edge instigates an
internal write cycle and the rising edge transfers the data byte on the
data bus to an internal register pointed by the address lines.
UART channel A select (active low) to enable UART channel A in the
device for data bus operation.
UART channel B select (active low) to enable UART channel B in the
device for data bus operation.
UART channel A Interrupt output. The output state is defined by the
user and through the software setting of MCR[3]. INTA is set to the
active mode and OP2A# output to a logic 0 when MCR[3] is set to a
logic 1. INTA is set to the three state mode and OP2A# to a logic 1
when MCR[3] is set to a logic 0 (default).
UART channel B Interrupt output. The output state is defined by the
user and through the software setting of MCR[3]. INTB is set to the
active mode and OP2B# output to a logic 0 when MCR[3] is set to a
logic 1. INTB is set to the three state mode and OP2B# to a logic 1
when MCR[3] is set to a logic 0 (default).
UART channel A Transmit Data. If it is not used, leave it unconnected.
UART channel A Receive Data. Normal receive data input must idle at
logic 1 condition. If it is not used, tie it to VCC or pull it high via a 100k
ohm resistor.
UART channel A Request-to-Send (active low) or general purpose out-
put. If it is not used, leave it unconnected.
3
D
ESCRIPTION
2.25V TO 5.5V DUART
XR16L2450