ACS8510REV2.1T Semtech, ACS8510REV2.1T Datasheet
ACS8510REV2.1T
Specifications of ACS8510REV2.1T
Related parts for ACS8510REV2.1T
ACS8510REV2.1T Summary of contents
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... TDI Chip Clock TMS 1149.1 Generator TRST JTAG TDO TCXO (*OCXO) Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS ynchronous quipment iming ource for SONET or SDH Network Elements Features Features Features Features Features •Suitable for Stratum 3E and 4 SONET or SDH Equipment Clock (SEC) applications • ...
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... Alignment of Priority Tables in Master and Slave ACS8510 ................................................................................................. 44 Alignment of the Selection of Reference Sources for TOUT4 Generation in the Master and Slave ACS8510 ........... 45 Alignment of the Phases of the 8kHz and 2kHz Clocks in both Master and Slave ACS8510 ....................................... 45 JTAG .................................................................................................................................................................................................................. 45 PORB ................................................................................................................................................................................................................ 45 Electrical Specification .......................................................................................................................................................................... 48 Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS 2 FINAL www.semtech.com ...
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... Figure 24. Write Access Timing in MULTIPLEXED Mode ................................................................................................................... 68 Figure 25. Read Access Timing in SERIAL Mode ................................................................................................................................ 69 Figure 26. Write Access Timing in SERIAL Mode ............................................................................................................................... 70 Figure 27. Access Timing in EPROM Mode ......................................................................................................................................... 71 Figure 28. LQFP Package ...................................................................................................................................................................... 72 Figure 29. Typical 100 Pin LQFP Footprint ......................................................................................................................................... 73 Figure 30. Simplified Application Schematic ...................................................................................................................................... 74 Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS 3 FINAL www.semtech.com ...
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... Table 39. Write Access Timing in SERIAL Mode (for use with Figure 26) ........................................................................................ 70 Table 40. Access Timing in EPROM Mode (for use with Figure 27) .................................................................................................. 71 Table 41. 100 Pin LQFP Package Dimension Data (for use with Figure 28) ................................................................................... 73 Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS 4 FINAL ...
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... GND_DIFF 39 VDD_DIFF 40 I5POS 41 I5NEG 42 I6POS 43 I6NEG 44 VDD5 45 SYNC2K DGND NC - Not Connected; leave to Float Internally Connected; leave to Float. 50 VDD Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS ACS8510 SDH/SONET SETS Rev 2.1 5 FINAL 100 SONSDHB 99 MSTSLVB TO9 94 TO5 93 TO4 92 DGND 91 VDD 90 TO3 ...
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... Table 1. Power Pins Table 1. Power Pins Table 1. Power Pins Table 1. Power Pins Table 1. Power Pins Table 2. No Connections Table 2. No Connections Table 2. No Connections Table 2. No Connections Table 2. No Connections Note input output power, TTL Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS ...
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... ADVANCED COMMUNICATIONS Table 3. Other Pins Table 3. Other Pins Table 3. Other Pins Table 3. Other Pins Table 3. Other Pins Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS FINAL / / / / www.semtech.com ...
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... ADVANCED COMMUNICATIONS Table 3. Other Pins (continued) Table 3. Other Pins (continued) Table 3. Other Pins (continued) Table 3. Other Pins (continued) Table 3. Other Pins (continued Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS FINAL / / / / www.semtech.com ...
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... In all modes, the frequency accuracy, jitter and drift performance of the clock meet the requirements of ITU G.812, G.813, G.823, and GR-1244-CORE. Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS ...
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... Over-Voltage Protection Over-Voltage Protection Over-Voltage Protection Over-Voltage Protection Over-Voltage Protection The ACS8510 may require Over-Voltage Protection on input reference clock ports according to ITU Recommendation K.41. Semtech protection devices are recommended for this purpose (see separate Semtech data book). 10 FINAL , IN1 www.semtech.com ...
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... MHz, • 38.88 MHz, • 51.84 MHz, • 77.76 MHz. Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS The frequency selection is programmed via the cnfg_ref_source_frequency register. internal DPLL will normally lock to the selected input at the frequency of the input, eg. 19.44 MHz will lock the DPLL phase comparisons at 19 ...
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... Table 4. Input Reference Source Selection and Priority Table Table 4. Input Reference Source Selection and Priority Table Table 4. Input Reference Source Selection and Priority Table Table 4. Input Reference Source Selection and Priority Table Table 4. Input Reference Source Selection and Priority Table Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS ...
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... AMI coding rules, as specified in ITU recommendation G.703. Departures from the nominal pattern are detected within the Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS ACS8510, and may cause reference-switching if too frequent. See section DC Characteristics: AMI Input/Output Port, for more details. If the ...
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... Note 2. The fundamental acceptance range and generation range is +/- 9.2 ppm with an exact external crystal frequency of 12.8 MHz. This is the default DPLL range, the range is also programmable from ppm in 0.08 ppm steps. Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS phase-locked loop. The failed reference source will be removed from the priority table and ...
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... OUT4 T and T . The former port will provide an AMI O8 O9 signal carrying a composite clock of 64 kHz and 8 kHz, according to ITU Recommendation Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS Jitter and wander frequency (log scale) Jitter and wander frequency (log scale ...
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... MFrSync clocks have a 50:50 mark space ratio. These are driven from the T OUT0 synchronized with their counterparts in a second ACS8510 device (if used), using the technique described later. Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS Jitter and wander frequency (log scale) Jitter and wander frequency (log scale ...
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... Where 1.544 MHz/2.048 MHz is shown, 1.544 MHz is SONET, and 2.048 MHz is SDH. Pin SONSDHB controls the default frequency output. Where the SONSDHB pin is High SONET is default, and when SONSDHB pin is Low SDH is default. Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS Wander and jitter are treated in different ways to reflect their differing impacts on network design ...
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... Locked mode, so long as the DPLL bandwidth is set high enough so that the DPLL can compensate quickly enough for any frequency changes in the crystal. In Free-run or Holdover mode wander on the crystal is more significant. Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS ...
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... Holdover mode). Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS 0.1 Hz 0.3 Hz 0.5 Hz 1.0 Hz 2.0 Hz 4 ANSI Tin1.101-1994, Section 8.2.2, requires that the phase variation be limited so that no more than 255 slips (of 125 µ ...
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... Figure 8. Phase error accumulation of T Figure 8. Phase error accumulation of T Figure 8. Phase error accumulation of T Figure 8. Phase error accumulation Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS output port output port output port output port output port OUT0 OUT0 OUT0 OUT0 ...
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... Microprocessor Interface Microprocessor Interface The ACS8510 incorporates a microprocessor interface, which can be configured for the following modes via the bus interface mode control pins UPSEL(2:0) as defined in Table 10. Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS Table 10. Table 10. Table 10. Microprocessor Interface Microprocessor Interface Microprocessor Interface Table 10 ...
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... A description of each register is given in the Register Map, and Register Map Description. Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS Interrupt Enable and Clear Interrupt Enable and Clear Interrupt Enable and Clear ...
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... Table 11. Register Map Table 11. Register Map Table 11. Register Map Table 11. Register Map Table 11. Register Map < > < Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS < > < > < > < > < > > < > < > < > < > < > < > < > < > ...
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... Table 11. Register Map (continued). Table 11. Register Map (continued). Table 11. Register Map (continued). Table 11. Register Map (continued Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS < > < > < > < > < > < > < > < > < > < > < > < > < > < > < > < > < > < > ...
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... ADVANCED COMMUNICATIONS Table 11. Register Map (continued). Table 11. Register Map (continued). Table 11. Register Map (continued). Table 11. Register Map (continued). Table 11. Register Map (continued < Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS > < > < > < > < > < > < > < > < > < > < > ...
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... ADVANCED COMMUNICATIONS Table 11. Register Map (continued). Table 11. Register Map (continued). Table 11. Register Map (continued). Table 11. Register Map (continued). Table 11. Register Map (continued Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS www.semtech.com FINAL ...
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... Register Map Description Register Map Description Register Map Description Register Map Description Register Map Description Table 12. Register Map Description Table 12. Register Map Description Table 12. Register Map Description Table 12. Register Map Description Table 12. Register Map Description Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS ...
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... ADVANCED COMMUNICATIONS Table 12. Register Map Description (continued). Table 12. Register Map Description (continued). Table 12. Register Map Description (continued). Table 12. Register Map Description (continued). Table 12. Register Map Description (continued Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS < > < > www.semtech.com FINAL ...
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... ADVANCED COMMUNICATIONS Table 12. Register Map Description (continued). Table 12. Register Map Description (continued). Table 12. Register Map Description (continued). Table 12. Register Map Description (continued). Table 12. Register Map Description (continued Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS < > < > < > < > < > < ...
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... ADVANCED COMMUNICATIONS Table 12. Register Map Description (continued). Table 12. Register Map Description (continued). Table 12. Register Map Description (continued). Table 12. Register Map Description (continued). Table 12. Register Map Description (continued Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS < > < > < > < > < > < ...
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... ADVANCED COMMUNICATIONS Table 12. Register Map Description (continued). Table 12. Register Map Description (continued). Table 12. Register Map Description (continued). Table 12. Register Map Description (continued). Table 12. Register Map Description (continued Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS < > < > < > < > < > < > < > ...
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... ADVANCED COMMUNICATIONS Table 12. Register Map Description (continued). Table 12. Register Map Description (continued). Table 12. Register Map Description (continued). Table 12. Register Map Description (continued). Table 12. Register Map Description (continued Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS < > < > < > < > www.semtech.com FINAL ...
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... ADVANCED COMMUNICATIONS Table 12. Register Map Description (continued). Table 12. Register Map Description (continued). Table 12. Register Map Description (continued). Table 12. Register Map Description (continued). Table 12. Register Map Description (continued " Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS " www.semtech.com FINAL ...
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... ADVANCED COMMUNICATIONS Table 12. Register Map Description (continued). Table 12. Register Map Description (continued). Table 12. Register Map Description (continued). Table 12. Register Map Description (continued). Table 12. Register Map Description (continued Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS ± ± www.semtech.com FINAL ...
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... ADVANCED COMMUNICATIONS Table 12. Register Map Description (continued). Table 12. Register Map Description (continued). Table 12. Register Map Description (continued). Table 12. Register Map Description (continued). Table 12. Register Map Description (continued Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS < > ° ‘ ‘ ’ < ...
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... Restoration of repaired reference sources is handled carefully to avoid inadvertent disturbance of the output clock. The ACS8510 has two modes of operation; Revertive and Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS ...
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... Unused ports should be given the value, '0000' or '1111', in the relevant register to indicate they are not to be included Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS in the priority table. On power-up, or following a reset, the whole of the configuration file will be defaulted to the values defined by Table 4. The ...
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... Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS enabled, then the value of this pin directly selects either <I_3> (SRCSW high) or <I_4> (SRCSW low). If this mode is activated at reset The pin will, by pulling the SRCSW pin high, then it configures the default frequency tolerance of < ...
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... N is the number of the relevent leaky bucket configuration in each case. The default setting are shown in the following: Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS as they occur and the phase locked loop must be temporarily isolated until the clock is once again pure. The clock monitoring process cannot ...
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... See Figure 9. Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS The ‘leaky bucket’ accumulators programmable for size, alarm set & ...
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... Free-run mode and another reference source is selected. Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS Locked mode Locked mode Locked mode Locked mode Locked mode ...
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... Register cnfg_holdover_offset register 40 bit 7 ‘auto holdover averaging’ is set high. The value is averaged Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS internally over 32 samples at 32 seconds apart, giving the average frequency over approximatley the last 20 minutes. The proportional DPLL path is ignored so that recent signal disturbances do not affect the Holdover frequency value ...
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... NE to the various consumers (clock sinks). With the possible exception of a Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS through-timing mode, the signals from the Master device will be used by all consumers, ...
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... These activities, in Master or Slave operation, are summarized in Table 12 and described in detail in Application Note AN-SETS-2. Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS Alignment of Priority Tables in Master and Slave Alignment of Priority Tables in Master and Slave Alignment of Priority Tables in Master and Slave ...
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... Multi-Frame Sync clock output of the Slave device is also fed to the Sync2K input of the Master device. Alignment of the Multi-Frame Sync input occurs only when cnfg_mode register, bit 3, address 34Hex External 2 kHz Sync Enable is set to 1. Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS The JTAG connections on the ACS8510 allow a full boundary scan to be made ...
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... Note 2: Slave ACS8510 uses common priority table, built before Master ACS8510 failed - priority table can be modified as status of the input reference sources changes Note 3: Slave ACS8510 outputs must remain in phase with those of Master ACS8510 Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS TCXO V ...
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... Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS free-run select ref (state 001) (2) all refs evaluated & & at least one ref valid (main ref invalid or out of lock > ...
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... Table 16. DC Characteristics: TTL Input Port Table 16. DC Characteristics: TTL Input Port Table 16. DC Characteristics: TTL Input Port Table 16. DC Characteristics: TTL Input Port Table 16. DC Characteristics: TTL Input Port Across all operating conditions, unless otherwise stated Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS ...
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... Table 19. DC Characteristics: TTL Output Port Table 19. DC Characteristics: TTL Output Port Table 19. DC Characteristics: TTL Output Port Table 19. DC Characteristics: TTL Output Port Table 19. DC Characteristics: TTL Output Port Across all operating conditions, unless otherwise stated Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS ...
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... Unused differential input ports should be left floating and set in LVDS mode, or the positive and negative inputs tied to VDD and GND respectively. Note 1. Assuming a differential input voltage of at least 100 mV. Note 2. Unused differential input terminated to VDD-1.4 V. Note 3. With 50 load on each pin to VDD-2 V. i.e. 82 Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS ...
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... MHz GND V DD 130R =50 Ω Z 8kHz, 1.544/2.048, O 6.48, 19.44, 38.88, 82R 51.84, 77.76 or =50 Ω 155.52 MHz GND Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS I5POS T06POS 130R I5NEG T06NEG 82R I6POS T07POS 130R I6NEG T07NEG 82R 51 FINAL V DD 130R =50 Ω ...
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... Table 21. DC Characteristics: LVDS Input/Output Port Across all operating conditions, unless otherwise stated ° Note to Table 21 Note to Table 21 Note to Table 21 Note to Table 21 Note to Table 21 Note 1. With 100 load between the differential outputs. Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS FINAL www.semtech.com ...
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... Z 51.84, 77. 155.52 MHz =50 Ω Z 8kHz, 1.544/2.048, O 6.48, 19.44, 38.88, 100R 51.84, 77.76 or =50 Ω 155.52 MHz Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS =50 Ω I5POS T06POS =50 Ω I5NEG T06NEG =50 Ω I6POS T07POS =50 Ω ...
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... AMI coding with a 50% to 70% duty ratio and the 8 kHz octet phase information by introducing violations in the code rule. The structure of the signals and voltage levels are shown in Figures 14 and 15. Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS S S ...
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... Figure 15. AMI Input and Output Signal Levels Signal structure of 64 kHz/ 8 kHz central clock interface after suitable transformer. 15.6us 15.6us 7.8us 7.8us + 1. -1.0V -1. Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS 15.6us 15.6us 7.8us 7.8us + 1. -1.0V -1. I_1 TO8POS C1 I_2 ...
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... The AMI differential output TO8POS/TO8NEG should be coupled to a line transformer with a turns ration of 3:1. Components C2 = 470 pF and nF transformer with a turns ratio of 1:1 is used, a 3:1 ratio potential divider R must be used to achieve the required voltage level for the positive and negative pulses. load Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS Turns ratio 1:1 TO8POS ...
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... Table 24. DC Characteristics: Output Jitter Generation (Test Definition G.812) Across all operating conditions, unless otherwise stated Output jitter generation measured over 60 seconds interval max measured using Vectron 6664 12.8 MHz TCXO on ICT Flexacom + 10 MHz reference from Wavetek 905 Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS ...
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... Table 26. DC Characteristics: Output Jitter Generation (Test Definition GR-253-CORE) Across all operating conditions, unless otherwise stated Output jitter generation measured over 60 seconds interval max measured using Vectron 6664 12.8 MHz TCXO on ICT Flexacom + 10 MHz reference from Wavetek 905 Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS ...
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... Table 29. DC Characteristics: Output Jitter Generation (Test Definition TR-NWT-000499) Across all operating conditions, unless otherwise stated Output jitter generation measured over 60 seconds interval max measured using Vectron 6664 12.8 MHz TCXO on ICT Flexacom + 10 MHz reference from Wavetek 905 & & Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS ...
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... Hz bandwidth, 19.44 MHz direct lock Note 11. 1.2 Hz bandwidth, 8 kHz lock Note 12. 0.6 Hz bandwidth, 19.44 MHz direct lock Note 13. 0.6 Hz bandwidth, 8 kHz lock Note 14 bandwidth, 8 kHz lock, 2.048 MHz input Note 15 bandwidth, 8 kHz lock, 19.44 MHz input Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS ...
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... Table 31. JTAG Timing (for use with Figure 17) Table 31. JTAG Timing (for use with Figure 17) Table 31. JTAG Timing (for use with Figure 17) Table 31. JTAG Timing (for use with Figure 17) Table 31. JTAG Timing (for use with Figure 17 Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS t CYC FINAL ...
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... MHz output 25.92 MHz input 25.92 MHz output 38.88 MHz input 38.88 MHz output 51.84 MHz input 51.84 MHz output 77.76 MHz input 77.76 MHz output Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS Typical Delay Output ± 1 kHz 2 kHz +6 ...
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... Table 32. Read Access Timing in MOTOROLA Mode (for use with Figure 19) Table 32. Read Access Timing in MOTOROLA Mode (for use with Figure 19 Note 1: Timing with RDY. If RDY not used, t Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS t pw1 t su2 t su1 address t d1 data pw2 becomes 178 ns. pw1 www.semtech.com FINAL ...
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... Table 33. Write Access Timing in MOTOROLA Mode (for use with Figure 20) Table 33. Write Access Timing in MOTOROLA Mode (for use with Figure 20 Note 1: Timing with RDY. If RDY not used, t Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS t pw1 t su2 t su1 address t su3 data pw2 becomes 178 ns. pw1 64 FINAL www.semtech.com ...
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... Table 34. Read Access Timing in INTEL Mode (for use with Figure 21) Table 34. Read Access Timing in INTEL Mode (for use with Figure 21 Note 1: Timing with RDY. If RDY not used, t Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS t t su2 su1 ata becomes 180 ns. pw1 www.semtech.com FINAL ...
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... Table 35. Write Access Timing in INTEL Mode (for use with Figure 22 Note 1: Timing with RDY. If RDY not used, t Note 2: Timing greater than 170 ns, otherwise 5 ns after CSB rising edge. h2 Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS t t su2 pw1 t su1 address t su3 data pw2 becomes 180 ns. pw1 www.semtech.com FINAL ...
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... Table 36. Read Access Timing in MULTIPLEXED Mode (for use with Figure 23) Table 36. Read Access Timing in MULTIPLEXED Mode (for use with Figure 23) Table 36. Read Access Timing in MULTIPLEXED Mode (for use with Figure 23 Note 1: Timing with RDY. If RDY not used, t Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS becomes 180 ns. pw1 www.semtech.com FINAL ...
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... Table 37. Write Access Timing in MULTIPLEXED Mode (for use with Figure 24) Table 37. Write Access Timing in MULTIPLEXED Mode (for use with Figure 24) Table 37. Write Access Timing in MULTIPLEXED Mode (for use with Figure 24 Note 1: Timing with RDY. If RDY not used, t Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS becomes 180 ns. pw1 www.semtech.com FINAL ...
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... R/W SDO Output not driven, pulled low by internal resistor CLKE = 1; SDO data is clocked out on the falling edge of SCLK CSB SCLK SDI R/W Output not driven, pulled low by internal resistor SDO Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS t pw2 t pw1 FINAL ...
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... Table 39. Write Access Timing in SERIAL Mode (for use with Figure 26) Table 39. Write Access Timing in SERIAL Mode (for use with Figure 26) Table 39. Write Access Timing in SERIAL Mode (for use with Figure 26) Table 39. Write Access Timing in SERIAL Mode (for use with Figure 26 Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS ...
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... Table 40. Access Timing in EPROM Mode (for use with Figure 27) Table 40. Access Timing in EPROM Mode (for use with Figure 27) Table 40. Access Timing in EPROM Mode (for use with Figure 27) Table 40. Access Timing in EPROM Mode (for use with Figure 27 Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS address t acc data FINAL ...
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... Exact shape of corners can vary defined as the distance from the seating plane to the lowest point of the package body. 7 These dimensions apply to the flat section of the lead between 0.10 mm and 0.25 mm from the lead tip. 8 Shows plating. Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS ...
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... Figure 29. Typical 100 Pin LQFP Footprint Figure 29. Typical 100 Pin LQFP Footprint Pitch 0.5 mm Notes (1) Solderable to this limit. Square package - dimensions apply in both X and Y directions. Typical example. The user is reponsible for ensuring compatibility with PCB manufacturing process, etc. Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS ...
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... ADVANCED COMMUNICATIONS Application Information Application Information Application Information Application Information Application Information Figure 30. Simplified Application Schematic Figure 30. Simplified Application Schematic Figure 30. Simplified Application Schematic Figure 30. Simplified Application Schematic Figure 30. Simplified Application Schematic Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS 74 FINAL www.semtech.com ...
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... Table 42. Changes from Revision 1.06 to 2.00 September 2003 Table 42. Changes from Revision 1.06 to 2.00 September 2003 Table 42. Changes from Revision 1.06 to 2.00 September 2003 Item Section Page Non-Revertive 1 36-37 Mode Revision 2.00/September 2003 Semtech Corp. ACS8510 Rev2.1 SETS Description Updated description of Non-Revertive Mode Operation 75 FINAL www.semtech.com ...
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... Life support - This product is not designed or intended for use in life suport equipment, devices or systems, or other critical applications. This product is not authorized or warranted by Semtech Corporation for such use. Right to change - Semtech Corporation reserves the right to make changes, without notice, to this product. Customers are advised to obtain the latest version of the relevant information before placing orders. ...