USB3315-CP-TR Standard Microsystems (SMSC), USB3315-CP-TR Datasheet - Page 5

USB3315-CP-TR

Manufacturer Part Number
USB3315-CP-TR
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of USB3315-CP-TR

Number Of Transceivers
1
Esd Protection
YeskV
Power Supply Requirement
Triple
Operating Supply Voltage (typ)
Not RequiredV
Package Type
QFN
Operating Temperature Classification
Industrial
Operating Supply Voltage (max)
Not RequiredV
Operating Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (typ)
1.8/2.5/3.3/5V
Mounting
Surface Mount
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Lead Free Status / RoHS Status
Compliant
Hi-Speed USB Transceiver with 1.8V-3.3V ULPI Interface - 24MHz Reference Clock
SMSC USB3315
10
11
12
13
14
15
16
17
18
3
4
5
6
7
8
9
CLKOUT
DATA[7]
DATA[6]
DATA[4]
DATA[3]
DATA[2]
DATA[1]
DATA[0]
DATA[5
VDD3.3
VDDIO
CPEN
VBAT
NXT
DM
DP
Table 1 USB3315 Pin Description (continued)
PRODUCT PREVIEW
Output,
Output,
Output,
Analog
Analog
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
Power
Power
Power
I/O,
I/O,
I/O,
I/O,
I/O,
I/O,
I/O,
I/O,
I/O,
I/O,
5
High
High
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
Regulator input. The regulator supply can
be from 5.5V to 3.1V.
3.3V Regulator Output. A 2.2uF (<1 ohm
ESR) bypass capacitor to ground is
required for regulator stability. The
bypass capacitor should be placed as
close as possible to the USB3315.
D- pin of the USB cable.
D+ pin of the USB cable.
External 5 volt supply enable. This pin is
used to enable the external Vbus power
supply. The CPEN pin is low on POR.
This pad uses VDD3.3 logic level.
ULPI bi-directional data bus. DATA[7] is
the MSB.
ULPI bi-directional data bus.
ULPI bi-directional data bus.
ULPI bi-directional data bus.
60MHz reference clock output. All ULPI
signals are driven synchronous to the
rising edge of this clock.
ULPI bi-directional data bus.
ULPI bi-directional data bus.
ULPI bi-directional data bus.
ULPI bi-directional data bus. DATA[0] is
the LSB.
1.8V to 3.3V ULPI interface supply
voltage. This voltage sets the value of
V
The PHY asserts NXT to throttle the data.
When the Link is sending data to the
PHY, NXT indicates when the current
byte has been accepted by the PHY. The
Link places the next byte on the data bus
in the following clock cycle.
OH
for the ULPI interface.
Revision 1.3 (11-02-07)

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